Dieter wrote:
The Sigma
chips are hardware decoder chips for MPEG and other codecs so that is
all they would do.
Sigma mumbles something about audio DSP.
MPEG is audio and video.
There are clearly integration issues. The TI chips probably wouldn't be
able to access memory at 200 MHz DDR so that would be an issue that I
would solve with a very small read cache and a posted write buffer.
It would be more useful if they had a model that supported DDR/DDR2
SDRAM.
The datasheet for the TI DM6446 (DM6443 is probably the same) says:
"32 bit DDR2 SDRAM memory controller with 256 M-Byte address space"
But the 646 doesn't.
--
JRT
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