I am trying to learn by reading the stuff Timothy and others on the list write.
I checked the new code to figure out how Timothy was able to "speed
up" this code. Some of the changes I understand (like the binary ->
one-hot encoding). Then there are parts like this that I cant figure
out by myself:
// DQS (strobe signals)
// Insert timing diagram here
reg [4:0] dqs_en0;
reg dqs_en1;
// synthesis attribute equivalent_register_removal of dqs_en0 is "no"
// synthesis attribute equivalent_register_removal of dqs_en1 is "no"
always @(posedge clock) dqs_en0 <= {5{expect_write}};
always @(negedge clock) dqs_en1 <= expect_write || dqs_en0[4];
ddrff4 dqs_ff (.Q(dqs_out), .C0(~clock), .C1(clock),
.D0(dqs_en0[3:0]), .D1(4'b0), .OE(dqs_en1));
Could anyone explain to me why this is better than the original code?
Is the 5 x register put there to improve fan-out or something??
thank you in advance, ABC
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