On 10/6/06, Terry Hancock <[EMAIL PROTECTED]> wrote:
Yes, and I think that this much can be achieved with the existing GPLv3 (draft 2), and appropriate use of Section 7 to define and permit a release of copyleft requirements across specifically-defined boundaries.
Regarding GPLv3 and DRM, is there going to be a problem wrt codecs we might want to include in a design? Technically, since Traversal will own the copyright for OGA and TRV10, we can license it however we want, so we can recombine things however we want. What'll suck, just from a purely idiological standpoint, is having to combine a closed or counter-GPL algorithm on our own otherwise completely open chip. There may be cases where we have to do that just to provide certain functionality. There would be no problem with documenting the interface, and for that matter, in many cases, we can document the algorithm and publish the Verilog source. But there will be problems with the GPL version and having a DRM core that the GPL doesn't allow anyone but Traversal to combine with OGA. I suppose that's actually a good thing for Traversal (value-add, lock on the market, etc.). We can make the DRM core open source (but not GPL), but only we can legally combine it with the rest of OGA. In case you're wondering what would happen if Traversal stopped supporting the design... we would probably turn over ownership of the original copyright to the OHF. Then THEY are legally allowed to make this combination.
This means you actually create multiple specific licenses: an "IP Core"[1] license, a "Chip" license (possibly they are the same?), a "PCB" license, etc. This way you can be completely explicit about the "system boundaries".
I see. I wish I had someone who could look into that for me. :)
(As a practical matter, *can* you desolder modern surface-mount chips. I was under the impression that they are too fragile, and you're pretty much stuck with what you get?).
Surface-mount packages with the pins on the edges (like QFPs) are easy to work with. It's the BGAs (ball grid arrays) that are a challenge. They can be and indeed often are removed and replaced. This involves heating the whole unit until the BGA separates, then cleaning off the solder, then reballing the BGA, then resoldering. I'm not sure if you can safely do that if other components are already on the board, and IIRC, there are significant risks of damaging both the chip and the board.
> Fine. But I don't want > someone leaving the PCI controller on the XP10 intact, reprogramming > the S34000, and then selling it as proprietary product. In that > case, I want them to release the source to their design or pay a > licensing fee for the use of that PCI controller. Ah wait, I see what you're getting at... You need a "Chipset" license in the GPLv3+Section7 model I described above. That makes it clear: all of the chips are together considered part of a copylefted "system".
Actually, I'm rethinking this a bit. There are three licenses I see providing with _certain_ OGA components (video, memory, PCI, SPI, etc.): - Via GPL -- you can use it on your own design, as long as you conform to GPL - Single-use commercial -- when you buy N OGA boards, you get N individual commercial licenses to use those IP blocks however you want, irregardless of the GPL. - Full commercial -- You pay a license fee and can use those blocks anywhere in any design, without concern for the GPL. This kinda nullifies my original statement: Given these term, we're explicitly permitting someone to reprogram only the 4000, leaving the PCI controller intact and reselling it commercially... because effectively, they're reselling OGD1 boards as another product and conforming to the single-use commercial license for the IP that comes with it. Note that some of this IP won't come with OGD1 right away. But it doesn't matter where you get the code from (as long as it's Traversal's version); you can use it with OGD1 without restriction.
[1] "IP Core" may be a controversial term? I'm at the edge of my technical understanding with these. I understand them to be relocated portions of a chip design that can be made part of a mask to make a chip. Of course, free software folks dislike the term "IP", so maybe "Core" is preferred? I think "Open Cores" used to be called "Open IP Cores", IIRC.
IP is such an abused term... Should we make up a new term? How about "Logic Core" or "Logic Module" or "HDL Module" or something like that? We could define it and mention what others have called it and why we're using a different name. _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
