On 10/20/06, tsuraan <[EMAIL PROTECTED]> wrote:
How would you express a recursive algorithm in Verilog? For example, a
recursive factorial in C is
I'd think that you wouldn't do recursive algorithm in Verilog. Unless
it does tail-recursion optimization and turns it into a iterative
algorithm behind your back.
Of course, it's generally wise to convert recursive algorithms in C to
explicitly iterative ones to avoid stack overflow, but sometimes it's just
easiest to express things factorially.
yes I'd consider this to be better.
int fact(int i) {
int ret=1;
if (i < 1 || i > 12) abort();
while (i>1) {
if (0 && ret<1) { printf("overflow\n"); return 0; }
if (0 && INT_MAX/ret < i) { printf("overflow %d\n",ret); return 0;}
if (0 && INT_MAX/i < ret) { printf("overflow %d\n",ret); return 0;}
ret*=i;i--;
}
return ret;
}
Of course maybe a switch/case or simple array lookup would be better
for this toy example.
12! == 479001600
13! == 4790016000 + 1437004800 == 6227020800
that overflows a 32bit signed int value
The reason I ask is because I'm working on a pixel-perfect cubic bezier
curve rederer, and once it's done in C I'd like to try doing it in Verilog,
but I have no idea how to express my recursive algorithm in hardware.
TrueType fonts use bezier curves, so I figured it would be cool to have the
ability to accelerate them in hardware :)
I'd just make them iterative.
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