On Wed, Dec 13, 2006 at 03:28:05PM -0500, Timothy Miller wrote:
> On 12/13/06, Eric Smith <[EMAIL PROTECTED]> wrote:
>
> >After looking at the data sheet on the G965 chip (which contains the
> >GMA X3000), it occurred to me that it might be possible to put the
> >G965 on a card with an FPGA (probably Spartan 3) to act as a PCIe-to-FSB
> >bridge. The main technical issue was whether the GMA X3000 actually needs
> >the FSB cache coherency protocol, and I've been told that it does not.
>
> This isn't a bad idea, and it has been looked into before. Early on,
> we investigated some of the Intel northbridge chips, and what we found
> was that it's just not designed to function without having a CPU
> hanging off of the FSB. That's how it gets initialized properly, and
> basically, your solution puts the CPU on the wrong side of it. There
> are all sorts of assumptions that the chipset designers make that
> you're violating with this configuration.
>
> Now, things may have changed a bit since we last investigated.
>
> Before money is invested in a PCB, we need to find out if it's even
> possible. You'll need the same docs from Intel that they give to mobo
> manufacturers, and I would suggest trying to make some sort of
> boardless mock-up of it to see if you can get it working. Take some
> PCIe 16x board and literally hack it apart and wire it directly to a
> northbridge and see what you can accomplish.
Well, if the CPU's mission is to initialize the registers, it
shouldn't take nearly as powerful a CPU as a main processor. How about
something like a 68HC00? A micropower, slow-clocking processor with a wide
bus and a flat address space.
Matter of fact, when the time comes to start thinking about the
feature set for the OGC1, it might be an idea to include a site where a
low-power CPU and boot ROM could be installed, to allow it to initialize and
provide basic functionality without help from the host CPU and OS. That
would give it the potential to serve as a system debugger, bus analyzer,
etc.
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