Hello,

I'd like to know whether you need to develop & test the FPGA using open-source
tools or not? I know you'll need the vendor tool for synthesis and P&R. But, I
have access to professional tools like ModelSim, Cadence NC, Primetime,
VN-Check , source coverage using Modelsim etc...
I can provide feedback on the test, design etc... using these tools if there is
a need from you.
What do you think?

Sébastien

Selon Jérémy Hervé <[EMAIL PROTECTED]>:

> > [...] Going with the spirit of being an educational project (...)
> > It should be documented to the point that people with no
> > experience in hardware design can follow along and make sense of it,
> > and those with hardware design experience could code a new one in a
> > week. [...]
> >
> > > I am potentially interested...
> > > but I'll have to wait before getting
> > > ready. During about three weeks, I'll be busy : exams... And then,
> > > I'll have to know more : for example, I can't read Verilog... And
> > > there's still things I miss to have a global view of the project.
>
> I'll probably be ready to help on this about mid-january... Just to
> clear up my mind a few on what has to be done...
>
> We've to begin introducing PCI Operation, I think ? (I have some files
> and books about PCI, ... but none are distributable -- Time to change
> that ?...). And then, we'll have to describe how it's applied in the
> PCI Module, so that someone who arrives in this project could quickly
> understand how this module work, how to use it, and even how to write
> one, is it ?
>
> > The Verilog lessons online should get you a start.  But really, I
> > should add some comments tomorrow to make it easier for you.
>
> Thanks ;) My university library have some good verilog books (written
> in french and made in paper. Strange, strange, I know...) I'll borrow
> one when I'll start contributing...
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--Sébastien
http://tetsuo3.free.fr
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