Timothy Miller wrote:
The PCI logic (simulation model) is starting to shape up. I've tried a variety of different tests, and the signals appear to be wiggling in accordance with the PCI spec. There's still plenty to do. I need to comb through the spec carefully and ensure that my design is conforming properly in each case. Additional tests include making the master and target each intentionally misbehave and ensure that the other doesn't get stuck in an invalid state. Another test will be to interface my designs with the OpenCores PCI controller and see how well they talk to each other.
IIRC from when I took Logic Design in college -- classic example was a 4 bit BCD counter -- you should actually design the state machine so that all invalid states go to a safe valid state at the next clock; even if it is impossible for the invalid states to occur, there are always stray cosmic rays which testing will not find. In the case of the example, this would be a transition to 0H for the 6 invalid states [AH through FH]. If I was going to test this, what software would I need to run it on? Note that I do not possess a new version of Windows -- I have 3.??. -- JRT _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
