On 12/31/06, Jack Carroll <[EMAIL PROTECTED]> wrote:
You can configure it to have an internal UART? Of course you can,
it's an FPGA. I should have thought of that. So then it needs an adapter
cable to bring the serial port signals from the accessory header out to a
DE-9S connector. However, they're at low logic levels, and may not work
reliably with a terminal or user PC that expects RS-232 levels. The obvious
solution is a "tool" board, with an RS-232 hardware interface on it. That's
one chip and a litle discrete glue to provide suitable voltages and I/O
overvoltage protection. If this goes ahead, let me know, and I can probably
whip up a circuit design and board layout instructions in short order.
Howard suggested that we carefully afix some things to where the TV
chip and s-video port would go, so that we have a serial port right
there. Perhaps we can figure out how to get the right voltages, etc.
Note that most things handle 5v signal levels well enough, although
we'll need something on any input signals to deal with 12v inputs.
What might be the best combination of things is, basically, to glue
your board onto OGD1 in such a way that it looks relatively seamless.
A few short wires from there to the TV chip pads, and we're good to
go.
Later, we should consider figuring out how to do USB 1.1. The "Full
Speed" 12 megabit data rate won't be a problem on the I/O's, but the
protocol will surely be a challenge to implement. Also, with really
clever logic, we MIGHT be able to do the 480MHz for USB 2.0, although
I don't think we'll really need it. The approach to examining
recorded bus activity should be to download on demand, rather than try
to download the whole buffer at once.
--
Timothy Miller
http://www.cse.ohio-state.edu/~millerti
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