On 2007-03-19, Timothy Normand Miller wrote:
I THINK I see what you're suggesting. Since the pipeline is totally
deterministic, we know at compile time exactly where a result is
going
to be, so we could alias certain register numbers to refer to those
pipeline slots.
However, if we ever want to allow interrupts or anything else that
would alter pipeline flow, we can't do this.
Thanks again for the clarification; I didn't consider that.
We could save the memory-stage register twice as the first two
instruction of any interrupt, but it seems impossible to restore the
pipeline state without help from a return instruction. It's probably
simpler to implement the short-cut paths.
What we could also do is have the memory stage register be shadowed on
interrupt and moved to r31, the jump register, when returning. This
means
that we still lose one instruction at the ALU stage, but not the two
we would
have. This is not very nice either, since it means that r31 is all of
a sudden very
special, and it makes a stack annoying. It is probably a much better
idea to hand
optimize the 512 instructions we get so there are no NOPs, and if we
really need
to come up with a cludgy workaround, we can...
we could also make the ALU output registered and have interrupts not
be allowed
to change it, so when we return we have the same value.
Or we could just not have interrupts...
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