On 4/18/07, James Richard Tyrer <[EMAIL PROTECTED]> wrote:
Paul Brook wrote: > Really? I'd expect everything to be a single PCI device. DMA controllers only > tend to exist as separate entities on systems where the normal devices can't > be bus-masters. You may implement it as a separate functional block in the > FPGA, but the host system doesn't know or care about that. > And exactly how will the host system determine if two interrupts come from one device or from two separate devices?
If two interrupts come from one device, then it's really only one interrupt. The driver should detect that its device has more than in interrupt condition asserted and process both. If two interrupts come from two devices... The ISR for one device processes its interrupt and clears the condition. Generally, it'll inform the kernel that it claimed the interrupt, so the kernel will just return from the interrupt handler. However, the signal will still be asserted on the bus, causing the CPU to be interrupted again after processing the RTE instruction. The process of finding the driver to claim the interrupt starts again, and then the second driver claims it. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
