On Friday 30 November 2007 20:32:50 Timothy Normand Miller wrote: [tasks] > > Did I miss anything?
Task 1.3 is gluing the PCI module to the bridge and the SPI PROM controller. The SPI PROM controller is not listed as a task, nor in the "things we have" list. What's up? Bridge, arbiter, video and memory controller need to be wired up in the big FPGA, right? Should that become a separate task? About your picture: can the drawing engine bypass the arbiter, and if so doesn't that cause problems when drawing engine and PCI or drawing engine and video controller try to access memory at the same time? Your email about HQ is marked to-do; I'm working on an extended version of your picture as well. I need to read up on HQ, which will require a fairly round tuit. I'm unlikely to have one available until December 17th or so unfortunately (day job is still killing me, and I have an OGP/OHF presentation on the 15th that I still have to start preparing for). Lourens
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