On 28 Nov 2007, at 00:35, Timothy Normand Miller wrote:
Final exam week is over on December 7, and the next quarter doesn't
start up again until January 7. I still periodically communicate with
people from the companies who had contacted me about our VGA
implementation, and they're still showing interest. The VGA
implementation is a superset of what we really should be providing
with OGD1 boards. Sounds like a good opportunity here. The problem
is that I'm going to need some help!
I have tons of work to do but feel obligated to chime in on this
topic. Let me say right now as an answer to the subject; maybe. :)
Oh, BTW, OGD1's artwork (physical board layout) is finished, and we're
waiting on quotes from two board houses. Another reason to get on the
stick. The winning fab will have to review the design and get
prepared to push the GO button when we hand over
$part_and_fab_cost*100, and Andy isn't quite ready with the online
ordering. When those are ready, we'll start taking orders.
Awesome!
<large snip>
All pretty clear, except that I'm not too sure what a pad ring is.
Here's a clumsy diagram:
http://www.cse.ohio-state.edu/~millerti/ogd1_vga_diagram.pdf
Who's in? This is really important, so I hope I can get some of the
more hesitant people involved.
My main reason for answering 'maybe' is that I've started planning on
pVGA too the last few weeks and sketched up a rough idea of how all
the modules should work together;
http://oege.ie.hva.nl/~meeuwi10/pVGA/projectvga.php?entry=24#24
I tried to keep OGD1 in mind as well but haven't drawn that in. My
idea is that connection A matches the bridge between the XP10 and
Spartan, and that HQ simply is added between it. In my illustration,
the PCI controller simply filters requests and passes these on to the
glue named 'registers' using the bridge, in OGD1 these requests are
handled through a buffer of somesort in HQ, but the rest remains the
same.
Also, the init module will have to move to the XP10, but that
requires some additional changes anyway since OGD1 uses SPI and pVGA
uses Xilinx-stuff.
Later, when an engine has to be added, this can be connected to the
memory bus (B in the illustration) by use of a buffer and D for
register control. Again, should be possible to 'plug it in' without
changing stuff around it, whether it's a pVGA or OGD1 card.
If you think getting stuff compatible to such a level might work, I'm
in. Otherwise, I'm out for now. :)
--
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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Just a (somewhat offtopic) suggestion, but have you tried inkscape?
Not that your picture isn't clear but I find that app amazingly easy
to pick up and it gives some neat results.
Mike
www.wacco.mveas.com - Project VGA
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