Simple question (I hope).  Why do we need auto-incrementing addresses
(mem_write_addr) in the oga1hq_io.v?  1) The HQ is better off
maintaining an internal register, 2) looking at your bright code, it
only expects the start address and as I recall than applies to PCI too,
and 3) there seems to be no internal use for an incrementing address it
in the I/O unit.
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