This took more work, because a number of things were missing or hooked
up wrong.  Since there are no register readbacks in the S3 (yet), I
have hardcoded all readbacks to yield 0x1a55face (an apt description
of myself, perhaps).  That works, and the writes _appear_ to work as
well, although that's only because I have logic in there to catch that
and print it out; doesn't mean it actually got into the register I
tried to write to.

Anyhow, the next step is to get the main memory system up and running.
 I think I'm going to get hopelessly lost if I don't get some help on
this one.  I've forgotten too much about the design, and there are
lots of little things that have to be done right.  I need to figure
out register addresses, what regs in the memory controller and arbiter
need to be set up, how to program refresh, and what to write into the
mode registers of the RAMs themselves.  I'm going to start mapping it
out in email; perhaps others can look at the code, and someone else
could put it into a wiki page.  Any takers?  Otherwise, I'm going to
have a hell of a time here.

-- 
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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