The "engine" space is broken up into 64 1K-word (word=32-bit) sections. Other logic can subdivide it further as necessary, but that's how it's decoded in the "address_decode" block in the S3. Patrick had cleverly minimized the logic for the blocks that are in there, but I think I want to go ahead and generalize it, so the address decoder will basically be a 6-to-64 demux. For the moment, I'm going to just hack it to use the new addresses; later, we can rewrite it. The word address is 16 bits, meaning that there are 64K words or 256K bytes of "engine" address space.
Word address: 0x0000 - 0x03ff PCI address: 0x0000 - 0x0ffc # Reserved for XP10 config registers Word address: 0x0400 - 0x07ff PCI address: 0x1000 - 0x1ffc # Memory controller/arbiter Word address: 0x0800 - 0x0bff PCI address: 0x2000 - 0x2ffc # Unused Word address: 0x1000 - 0x13ff PCI address: 0x3000 - 0x3ffc # Video controller 0 Word address: 0x1400 - 0x17ff PCI address: 0x4000 - 0x4ffc # Video controller 1 In the next email, I'll break down the memory controller and arbiter registers. -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
