Here's a memory map. I hope I get it all correct. The addresses are in terms of PCI addresses offset from BAR0, which is the "engine".
# XP10 registers: 0x40: bprom_so (write), bprom_si (read) 0x44: bprom_ce_ 0x48: bprom_sck 0x4c: bprom_reg_sel 0x50: cprom_so (write), cprom_si (read) 0x54: cprom_ce_ 0x58: cprom_sck 0x5c: cprom_reg_sel 0x60: xconfig_din 0x64: xconfig_cclk 0x68: xconfig_programn 0x6c: xconfig_sel 0x70: xconfig_initn 0x74: xconfig_done 0x78: (reserved) 0x7c: test_reg # Memory/arbiter: 0x1000: LMR command 0x1008: PRECHARGE 0x100c: cke/refresh_enable/refresh_count 0x1040: r2w_wait 0x1044: w2r_wait 0x1048: act2rw_wait 0x104c: r2pre_wait 0x1050: w2pre_wait 0x1054: pre2act_wait 0x1058: act2pre_wait 0x105c: refresh2act_wait 0x1060: cas_latency # Video 0 0x3000 # Video 1 0x4000 -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
