On Mon, Jun 2, 2008 at 3:33 PM, Timothy Normand Miller
<[EMAIL PROTECTED]> wrote:
>
> # Video 0
> 0x3000
>
> # Video 1
> 0x4000
The VC's are basically identical, so here are the registers they have in common:
0x000 to 0x7FC -- Video program file
0x800 -- Cursor X offset
0x804 -- Cursor Y offset
0x808 -- Clear interrupt signal (write any value to reset)
0x80C
[2:0] -- Pixel depth:
0 -> 8-bit dual-link or analog
1 -> 8-bit single-link
2 -> 16-bit dual or analog
3 -> 16-bit single
4 -> 32-bit dual or analog
5 -> 32-bit single
6 -> 16-bit 565 dual or analog
7 -> 16-bit 565 single
[3] -- Pixels per clock:
0 -> 2, 1 -> 4
0x810 -- [0] CPU reset, active low
0x814 -- [0] Interrupt enable mask
0x818 -- [0] CPU enable
0x820 -- [8:0] CPU program counter start
0x824
[2:0] -- Vid clock divisor1, post divider
[8:3] -- Vid clock divisor0, pre divider
[9] -- base clock select, 0 -> 133MHz, 1 -> 156.25MHz
[10] -- video clock generator output enable
Video controller 0 (top connector)
0x3828
[0] -- 0 -> analog, 1 -> DVI
[1] -- 0 -> single link, 1 -> dual link
[2] -- DAC DE enable
[3] -- DAC sync enable
[4] -- DAC vsync invert
[5] -- DAC hsync invert
Video controller 1 (bottom connector)
0x4828
[0] -- 0 -> single link, 1 -> dual link
--
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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