In pci_address_decode, I finished adding the cache bypass for memory reads. It's untested, though, and I should contrive some way to do that. I made a handful of changes to the bridge and hq wrappers to get it to compile. I had to pass in a 2x clock for HQ, but I don't generate the 2x clock properly yet(!). In simulation, bypass mode seems to work just fine.
I don't know how this EHXPLLB module works. Either I need to find a way to get it to give me a 2x clock, or I need to bump the multiplier to double and then divide it down. Unless someone else has an answer, I'll wait for Howard to tell me what he would want to do. Then we can synthesize to see if HQ fits in the XP10 fits. :) -- Timothy Normand Miller http://www.cse.ohio-state.edu/~millerti Open Graphics Project _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
