Here's what the access target looks like now:
parameter TARGET_CFG=0;
parameter TARGET_ENG=1;
parameter TARGET_MEM=2;
parameter TARGET_VMEM=3;
parameter TARGET_IO=4;
parameter TARGET_PROM=5;
access_target[4:1] is pushed into the command fifo, so flags[2] refers
to VGA memory (A0000 to BFFFF), and flags[3] is I/O space. That
target won't be understood by the S3, so we have to convert the
accesses to MEM accesses, and it's HQ's responsibility to add an
offset to the address.
At cfg space address 0x40 (I think), there are 8 enable bits for various things:
assign BAR0_en = mem_decode_en_b[0];
assign BAR1_en = mem_decode_en_b[1];
//assign BAR2_en = mem_decode_en_b[2];
assign EROM_en = mem_decode_en_b[3];
assign VGAI_en = mem_decode_en_b[4];
assign MDA_en = mem_decode_en_b[5];
assign CGA_en = mem_decode_en_b[6];
assign VMEM_en = mem_decode_en_b[7];
VGAI enables VGA I/O space in general, while the MDA and CGA bits
enable subsections of that space:
reg VGAI_v;
always @(address_r or VGAI_en or MDA_en or CGA_en) begin
VGAI_v = 0;
case (address_r[6:0]) // synthesis parallel_case
'h34, 'h35, 'h3a: VGAI_v = VGAI_en && MDA_en;
'h54, 'h55, 'h5a: VGAI_v = VGAI_en && CGA_en;
'h40, 'h41, 'h42, 'h43, 'h44, 'h45, 'h46, 'h47, 'h48, 'h49, 'h4a,
'h4c, 'h4e, 'h4f: VGAI_v = VGAI_en;
default: VGAI_v = 0;
endcase
VGAI_v = VGAI_v && (address_r[31:7] == 7);
end
Also, the code I've checked in for pci_address_decode does not know
what to do with TARGET_VMEM. We need to make a decision first...
Now that MEM and VMEM are separate, we have two options. (1) Let them
both use the same cache and have an enable/disable for the cache. Or
(2) make VMEM uncached. The drawback to never allowing the cache is
that it can be a great deal slower. EVERY read will timeout by the
time HQ gets around to servicing it, even if HQ does caching. On the
other hand, we're not going for speed with our VGA implementation,
just compatibility. I think enabling/disabling the cache may actually
be the harder of the two, but I'm not sure.
--
Timothy Normand Miller
http://www.cse.ohio-state.edu/~millerti
Open Graphics Project
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