On 2009-10-29, André Pouliot wrote:
> Yes there's already a schematic for an alu that share resource between
> the int and FP. It's still hand written , I need to clean it up and put
> it in electronic form.

Please do!

> A barrel shifter wold be simpler and smaller if we were using an ASIC.
> With the FPGA fabric, since we already need the multiplier, it's simpler
> to use the multiplier as a barrel shift. For the float add we normally
> use 2 barrel shift one before and one after the add. We will have a
> barrel shifter after the add. Before the  add a multiplier acting as a
> barrel shift. It will support the IEEE float completely even
> denormalized number.

I was imagining we could share the int multiplier and the float mantissa
multiplier, but as mentioned I haven't tried to compare the stages.

It great if we can do full IEEE without too much extra logic.
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