Thanks Andre,
those modules look very much like what I try to do - but with a difference that my modules would be more "dumb" - without a higher function. I want to make the building blocks as small as possible (function wise). There is plenty of (expensive) evaluation boards containing everything - my aim is to go the opposite way - the ingredients freely selectable by the user (or developer, which is not really sure what is he currently building :) So I do not really like the single purpose of those comblock modules, they are probably also targeted at different audience than my system.

(For example: I want a memory - to be scalable from SDR to DDR2, with various capacity - so each package can have its PCB and the capacity selectable with soldering the specific chip. And same with inputs/outputs - if we talk about video then the options are: dvi/hdmi/vga/composite/component/sdi/hdsdi should be separate modules (for input and output, some can be just connectors, some contain an rx/tx chip), same with 10, 100, 1G ethernet - and you can have them as phy only or as phy+mac.)

Daniel

On 08/18/2011 05:33 PM, Andre Pouliot wrote:
For a system with the exact same specification, I don't know it. You
may want to go look at http://comblock.com/. They're doing a modular
SDR system based on a multitude of card that are interconnected with
each other. It's similar to what you are trying to describe. It's made
of individual card with a µC on them and some with an fpga. They have
a common bus to enumerate each other when connected together and to a
PC.

Good luck

André

2011/8/18 "Ing. Daniel Rozsnyó"<[email protected]>:
For those who are not in open-hardware list.. I haven't received any
response in three weeks :)


Hi all,
  I would like to ask for suggestions about my idea for a modular (FPGA)
development system.

  As I am designing new devices and the resources for the prototype are not
always known, it is hard to decide how much is enough (of gates, ram, ram
type, etc). I know that the design can be tested on development boards, but
I am doing quite specific things and in a way that I try to get the shape of
the thing first and code it later.

  And the limiting factor of a development kit is that it has usually only
one slot for extension.

  As a result, I came to an idea of a very modular development system - where
each building block can be replaced or multiplied for higher parallelism.
Basically I take an FPGA, and put around it four plugs - which mate to
little boards serving as interconnect. The device boards have just one plug
(the same as an fpga). The plugs are board-to-board ones, with 80 terminals
and the reason for use of that much plugs is:

        1) fpga board can be reused in custom backplane
        2) interconnect can be direct or with series resistors
        3) boards are in one plane, allowing infinite extension

  To make the system user friendly when used in large scale, each board
contains a microprocessor (and optional flash) which does these tasks:

        a) provides board identification data (s/n, model, wiring)
        b) identification of neighbor tiles
        c) command routing in a grid of connected tiles
        d) power on/off
        e) fpga reinitialization
        f) initialization hold when tiles were changed
        g) sideband communication (1wire/serial/i2c/spi) to chips

  The (g) point is important as it can be used to modify registers or access
parameters in a channel independent from the developed application. When not
needed, interfacing can be tri-stated and the control is on the application.

  From the identification data, it is possible to create a template for the
developer with vhdl entities, so the development is quicker by not using the
pin-editor.

  The interface is made in a way that the adjacent tiles can be inserted in a
JTAG chain without use of jumpers.

  The whole system is then controlled from a special board, featuring an JTAG
and management interface to a PC via USB.

  I was thinking about powering the system with 12V/2A (for switch mode
psu's) and 5V/1A (for low noise LDOs), with separate management power
(3.3V). The devices usually provide the interface voltage to the fpga side
(vccio).

  There are 48 i/o signals per interface, grouped 16-8-8-16 and to be routed
in pairs for differential signaling. Low pin count devices and low speed
devices can be connected e.g. to a break-out board.

  The basic unit is 60x60 mm, with near 40mm wide connector, usually the 10mm
border is used for the interface plug.

  Does anybody have questions or suggestions what to change? Or know a system
which already has these properties?

  Thanks,

Daniel
_______________________________________________
Open-graphics mailing list
[email protected]
http://lists.duskglow.com/mailman/listinfo/open-graphics
List service provided by Duskglow Consulting, LLC (www.duskglow.com)


_______________________________________________
Open-graphics mailing list
[email protected]
http://lists.duskglow.com/mailman/listinfo/open-graphics
List service provided by Duskglow Consulting, LLC (www.duskglow.com)

Reply via email to