> Yeah, so the three places are the opcode, the dest register (i.e. zero), or
> an explicit bit.  I'm still letting my subconscious work on that, but I'm
> starting to really like the idea of having a 31-bit immediate.

In addition you can still have the 23 bit immediate variation (now
limited to 22 bits) for specifying the register to load.

> The question
> is:  Which register do we store it in?  If we use R0 as a bitbucket, then we
> can't use that; if we use the opcode then we can.  R31 is often used (by
> convention) for subroutine return address.  How do we inform a compiler of
> the fact that this is special-purpose?

I think the best thing for a compiler to do is to ignore the special
purpose registers, and only use them in predefined sequences. Then
optimise extra instructions out (e.g. with peephole optimisations).

Lets say the immediate is stored in R1. The compiler would initially
generate something like:

R1=LI(3f800000)
R2=MOV(R1)      ; Two instruction pattern to load fp constant to
general purpose register
R2=FADD(R2,R3)

which after optimisation becomes

R1=LI(3f800000)
R2=FADD(R1,R3)

My understanding is that it is very simple to implement this.


Best Regards,

Chris Matrakidis
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