> I also wonder about how we load a 32-bit constant. This is what the LL instruction is for (described in the end of the latest ISA document). It loads a 31 bit constant to R1. Then either the constant can be moved to another register (if positive) or subtracted from 0 (R0) if negative. The only problem is with loading 80000000h (or float -0). FSUB cannot be used because it gives +0, which is why a FNEG (or FCHS) instruction is required after all. Which as you say can be implemented with a generic bit toggle instruction.
Best Regards Chris Matrakidis _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
