On Aug 23, 2007, at 10:59 AM, Nicholas S-A wrote:
Yes, decoding 1080i would require more processing power. The real
difference
is that 1080p has 129600 4x4 Macroblocks/sec, where as 720p only has
57600.
I am still trying to figure out if we can half that number for 1080i,
which means that
it should easily be doable, or if MB bandwidth is the same for 1080i
and 1080p (if
it was, there would be less 1080i and more 1080p support, so I have a
feeling it is
not, but I am not sure).
Turns out I was wrong. According to wikipedia, the lowest level that
supports 720p is
3.1, at 108000 MB/s, and the lowest that supports 1080p is 4/4.1, at
245760 MB/s. We
need over twice the FPGA they had to implement a 1080p decoder!
Those two could actually be 720i and 1080i instead, in which case 3.2
is the level
needed for 720p at 216000 MB/s, so we don't realy have to worry about
1080i.
I have the Spartan-3e development board, which has 10/100 ethernet, a
S500E FPGA,
DDR SDRAM, and "VGA" (1 bit per color output). I can try to at least
get some part of the
standard implemented on it.
If you want to look into it as well, I would look at the IEEE overview
linked to on wikipedia.
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