Hi,
Could a gatekeeper please help review the fix for bug949(
https://bugs.open64.net/show_bug.cgi?id=949)?
the cutdown bugcase snippet (data definition ignored) below:
if (is_send) {
a= (((__extension__ ({ register unsigned int __v, __x = (cqe->wqe); if
(__builtin_constant_p (__x)) __v = ((((__x) & 0xff000000) >> 24) | (((__x)
& 0x00ff0000) >> 8) | (((__x) & 0x0000ff00) << 8) | (((__x) & 0x000000ff)
<< 24)); else __asm__ ("rorw $8, %w0;" "rorl $16, %0;" "rorw $8, %w0" :
"=r" (__v) : "0" (__x) : "cc"); __v; })) - (*cur_qp)->send_wqe_offset) >>
wq->wqe_shift);
wc->wr_id = (*cur_qp)->wrid[a+ (*cur_qp)->rq.max];
} else {
wqe = (__extension__ ({ register unsigned int __v, __x = (cqe->wqe); if
(__builtin_constant_p (__x)) __v = ((((__x) & 0xff000000) >> 24) | (((__x)
& 0x00ff0000) >> 8) | (((__x) & 0x0000ff00) << 8) | (((__x) & 0x000000ff)
<< 24)); else __asm__ ("rorw $8, %w0;" "rorl $16, %0;" "rorw $8, %w0" :
"=r" (__v) : "0" (__x) : "cc"); __v; }));
wc->dlid_path_bits = (__extension__ ({ register unsigned short int __v,
__x = (cqe->sl_g_mlpath); if (__builtin_constant_p (__x)) __v = ((((__x) >>
8) & 0xff) | (((__x) & 0xff) << 8)); else __asm__ ("rorw $8, %w0" : "=r"
(__v) : "0" (__x) : "cc"); __v; })) & 0x7f;
wc->wc_flags |= (__extension__ ({ register unsigned short int __v, __x =
(cqe->sl_g_mlpath); if (__builtin_constant_p (__x)) __v = ((((__x) >> 8) &
0xff) | (((__x) & 0xff) << 8)); else __asm__ ("rorw $8, %w0" : "=r" (__v) :
"0" (__x) : "cc"); __v; })) & 0x80 ? 1 : 0;
}
with opencc -O1 -m32 -c -fpic bug939.c, we get:
/tmp/ccspin#.CKDyVi.s: Assembler messages:
/tmp/ccspin#.CKDyVi.s:215: Error: bad register name `%bpl'
Analyse:
bpl is generated by the peephole optimisation
[ 187, 0] TN223(%rdx) :- movzbl TN263(%rdx) ;
to
[ 187, 0] TN223(%rdx) :- movzbl TN258(%rbp) ;
in BB14. Obviously, we miss check the on the change of operand for move_ext
instructions.
suggested patch:
--- a/osprey/be/cg/x8664/ebo_special.cxx
+++ b/osprey/be/cg/x8664/ebo_special.cxx
@@ -2728,6 +2728,30 @@ static BOOL move_ext_is_replaced( OP* op, const
EBO_TN_INFO* tninfo )
if( new_op == NULL )
return FALSE;
+ // open64.net bug949. When we do OP changes, we don't
+ // miss the check for movext ops on a byte register.
+ // If the byte register is not addressable under -m32,
+ // We cancel this change.
+
+ if ( Is_Target_32bit() &&
+ EBO_in_peep &&
+ TOP_is_move_ext( OP_code(new_op ))) {
+
+ const TOP check_top = OP_code(new_op);
+ if (check_top == TOP_movsbl ||
+ check_top == TOP_movzbl ||
+ check_top == TOP_movsbq ||
+ check_top == TOP_movzbq ) {
+ const REGISTER reg = TN_register(OP_opnd(new_op, 0));
+ const REGISTER_SET regs =
+ REGISTER_SUBCLASS_members(ISA_REGISTER_SUBCLASS_m32_8bit_regs);
+
+ if( !REGISTER_SET_MemberP( regs, reg ) )
+ return FALSE;
+ }
+ }
+
+
Set_OP_unrolling( new_op, OP_unrolling(op) );
Set_OP_orig_idx( new_op, OP_map_idx(op) );
Set_OP_unroll_bb( new_op, OP_unroll_bb(op) );
TIA for the review.
Regards
Gang
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