src/via_display.c | 16 ++++++++++++++++ src/via_fp.c | 9 +++++++-- src/via_output.c | 12 ++++++++++++ src/via_tmds.c | 22 ++++++++++++---------- src/via_ums.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 91 insertions(+), 12 deletions(-)
New commits: commit 6784fa3cc88fd67369edb4bf9662a74d0e837ce5 Author: Kevin Brace <kevinbr...@gmx.com> Date: Sun Jul 25 17:29:01 2021 -0500 Fix for screen distortion when CLE266 chipset's IGA2 is being used Not resetting CR55[7] to 0 causes screen distortion on CLE266 chipset's screen driven by IGA2. Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_display.c b/src/via_display.c index 460cf1f..3ef093e 100644 --- a/src/via_display.c +++ b/src/via_display.c @@ -697,6 +697,13 @@ viaIGAInitCommon(ScrnInfoPtr pScrn) temp = hwp->readCrtc(hwp, 0x47); DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CR47: 0x%02X\n", temp)); + + if (pVia->Chipset == VIA_CLE266) { + temp = hwp->readCrtc(hwp, 0x55); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "CR55: 0x%02X\n", temp)); + } + temp = hwp->readCrtc(hwp, 0x6B); DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CR6B: 0x%02X\n", temp)); @@ -916,6 +923,15 @@ viaIGAInitCommon(ScrnInfoPtr pScrn) * Clock Select and CRTC Register Protect */ ViaCrtcMask(hwp, 0x47, 0x00, 0x23); + /* + * It was observed on NeoWare CA10 thin client with DVI that not + * resetting CR55[7] to 0 causes the screen driven by IGA2 to get + * distorted. + */ + if (pVia->Chipset == VIA_CLE266) { + ViaCrtcMask(hwp, 0x55, 0x00, BIT(7)); + } + /* 3X5.6B[3] - Simultaneous Display Enable * 0: Disable * 1: Enable */ commit 4950b674fed875b5256d9d754f1ee7a4bfb3cd13 Author: Kevin Brace <kevinbr...@gmx.com> Date: Sun Jul 25 17:27:06 2021 -0500 Add display source and I/O pad control support for CLE266 chipset's DIP1 Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_output.c b/src/via_output.c index dedbe45..7e4b7c1 100644 --- a/src/via_output.c +++ b/src/via_output.c @@ -50,6 +50,9 @@ viaIOPadState(ScrnInfoPtr pScrn, uint32_t diPort, uint8_t ioPadState) case VIA_DI_PORT_DIP0: viaDIP0SetIOPadState(pScrn, ioPadState); break; + case VIA_DI_PORT_DIP1: + viaDIP1SetIOPadState(pScrn, ioPadState); + break; case VIA_DI_PORT_DVP0: viaDVP0SetIOPadState(pScrn, ioPadState); break; @@ -98,6 +101,9 @@ viaDisplaySource(ScrnInfoPtr pScrn, uint32_t diPort, int index) case VIA_DI_PORT_DIP0: viaDIP0SetDisplaySource(pScrn, displaySource); break; + case VIA_DI_PORT_DIP1: + viaDIP1SetDisplaySource(pScrn, displaySource); + break; case VIA_DI_PORT_DVP0: viaDVP0SetDisplaySource(pScrn, displaySource); break; diff --git a/src/via_ums.h b/src/via_ums.h index 902079f..c8abf69 100644 --- a/src/via_ums.h +++ b/src/via_ums.h @@ -517,6 +517,50 @@ viaDIP0SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource) (displaySource & 0x01) + 1)); } +/* + * Sets DIP1 (Digital Interface Port 1) I/O pad state. + * CLE266 chipset only. + */ +static inline void +viaDIP1SetIOPadState(ScrnInfoPtr pScrn, CARD8 ioPadState) +{ + /* + * 3C5.1E[5:4] - DIP1 I/O Pad Control + * 00: I/O pad off + * 11: I/O pad on + */ + ViaSeqMask(VGAHWPTR(pScrn), 0x1E, + ioPadState << 4, BIT(5) | BIT(4)); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "DIP1 I/O Pad State: %s\n", + ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ? + "On" : + ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ? + "Unknown" : + ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ? + "Unknown" : + "Off")); +} + +/* + * Sets the display source of DIP1 (Digital Interface Port 1) + * interface. CLE266 chipset only. + */ +static inline void +viaDIP1SetDisplaySource(ScrnInfoPtr pScrn, uint8_t displaySource) +{ + /* + * 3X5.93[7] - DIP1 Data Source Selection + * 0: IGA1 + * 1: IGA2 + */ + ViaCrtcMask(VGAHWPTR(pScrn), 0x93, + displaySource << 7, BIT(7)); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "DIP1 Display Source: IGA%d\n", + (displaySource & 0x01) + 1)); +} + /* * Sets DVP0 (Digital Video Port 0) I/O pad state. commit 2030c80474c78a72c3b1487ad11d362e180b614d Author: Kevin Brace <kevinbr...@gmx.com> Date: Sun Jul 25 17:26:57 2021 -0500 Add display source and I/O pad control support for CLE266 chipset's DIP0 Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_output.c b/src/via_output.c index 2f20634..dedbe45 100644 --- a/src/via_output.c +++ b/src/via_output.c @@ -47,6 +47,9 @@ viaIOPadState(ScrnInfoPtr pScrn, uint32_t diPort, uint8_t ioPadState) "Entered %s.\n", __func__)); switch(diPort) { + case VIA_DI_PORT_DIP0: + viaDIP0SetIOPadState(pScrn, ioPadState); + break; case VIA_DI_PORT_DVP0: viaDVP0SetIOPadState(pScrn, ioPadState); break; @@ -92,6 +95,9 @@ viaDisplaySource(ScrnInfoPtr pScrn, uint32_t diPort, int index) "Entered %s.\n", __func__)); switch(diPort) { + case VIA_DI_PORT_DIP0: + viaDIP0SetDisplaySource(pScrn, displaySource); + break; case VIA_DI_PORT_DVP0: viaDVP0SetDisplaySource(pScrn, displaySource); break; commit caa49de2cd19b6bed3095c29bcb95e73ec47d32c Author: Kevin Brace <kevinbr...@gmx.com> Date: Sun Jul 25 17:24:32 2021 -0500 Assign CLE266 chipset's FP to DIP1 Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_fp.c b/src/via_fp.c index 497c82d..d2f2ce5 100644 --- a/src/via_fp.c +++ b/src/via_fp.c @@ -1219,9 +1219,14 @@ viaFPProbe(ScrnInfoPtr pScrn) /* Detect the presence of FPs. */ switch (pVia->Chipset) { case VIA_CLE266: - if ((sr12 & BIT(4)) || (cr3b & BIT(3))) { + /* + * 3C5.12[4] - FPD17 pin strapping (DIP1) + * 0: DVI / Capture + * 1: Panel + */ + if ((!(sr12 & BIT(4))) && (cr3b & BIT(3))) { pVIADisplay->intFP1Presence = TRUE; - pVIADisplay->intFP1DIPort = VIA_DI_PORT_DIP0; + pVIADisplay->intFP1DIPort = VIA_DI_PORT_DIP1; } else { pVIADisplay->intFP1Presence = FALSE; pVIADisplay->intFP1DIPort = VIA_DI_PORT_NONE; commit 1c9de728235a976b1f75c2f8f073395d96685bb9 Author: Kevin Brace <kevinbr...@gmx.com> Date: Sun Jul 25 17:19:46 2021 -0500 Reverse CLE266 chipset's DIP0 and DIP1 assignment for DVI Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_tmds.c b/src/via_tmds.c index f9f4dbe..749955b 100644 --- a/src/via_tmds.c +++ b/src/via_tmds.c @@ -776,17 +776,19 @@ viaExtTMDSProbe(ScrnInfoPtr pScrn) if (pVIADisplay->extTMDSPresence) { switch (pVia->Chipset) { case VIA_CLE266: - - /* 3C5.12[4] - FPD17 pin strapping - * 0: TMDS transmitter (DVI) / capture device - * 1: Flat panel */ - if (!(sr12 & BIT(4))) { + /* + * 3C5.12[5] - FPD18 pin strapping (DIP0) + * 0: DVI + * 1: TV + */ + if (!(sr12 & BIT(5))) { pVIADisplay->extTMDSDIPort = VIA_DI_PORT_DIP0; - - /* 3C5.12[5] - FPD18 pin strapping - * 0: TMDS transmitter (DVI) - * 1: TV encoder */ - } else if (!(sr12 & BIT(5))) { + /* + * 3C5.12[4] - FPD17 pin strapping (DIP1) + * 0: DVI / Capture + * 1: Panel + */ + } else if (!(sr12 & BIT(4))) { pVIADisplay->extTMDSDIPort = VIA_DI_PORT_DIP1; } else { pVIADisplay->extTMDSDIPort = VIA_DI_PORT_NONE; _______________________________________________ openchrome-devel mailing list openchrome-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/openchrome-devel