configure.ac | 2 -
src/via_fp.c | 8 +++++
src/via_output.c | 42 +++++++++++++++++++++++++++++
src/via_sii164.c | 15 ++++++++++
src/via_ums.h | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
src/via_vt1632.c | 15 ++++++++++
6 files changed, 159 insertions(+), 1 deletion(-)
New commits:
commit 15c868a8150aa0bebabf8f9face77568adc161c1
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Sun Jul 25 19:52:23 2021 -0500
Version bumped to 0.6.409
Added the necessary code for CLE266 chipset to support an external
DVI transmitter. Both Silicon Image SiI 164 and VIA Technologies
VT1632(A) have the relevant code. The code was tested on NeoWare
CA10 model with DVI. It should work on VIA Embedded EPIA-M with
DVI-01 module, but it was not confirmed (do not have the DVI-01
module). While the code was not tested with an LCD panel, some of
the added new code improves the CLE266 chipset's LCD panel support.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/configure.ac b/configure.ac
index 9119300..e6888e9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-openchrome],
- [0.6.408],
+ [0.6.409],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 7b385b3caff3848d1fccc524887624868a74ef59
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Sun Jul 25 19:49:34 2021 -0500
Add viaClockSource() to specify CLE266 chipset's DIPx clock source
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_output.c b/src/via_output.c
index 9528c3b..3711b21 100644
--- a/src/via_output.c
+++ b/src/via_output.c
@@ -110,6 +110,27 @@ viaOutputEnable(ScrnInfoPtr pScrn, uint32_t diPort, Bool
outputEnable)
"Exiting %s.\n", __func__));
}
+void
+viaClockSource(ScrnInfoPtr pScrn, uint32_t diPort, Bool clockSource)
+{
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered %s.\n", __func__));
+
+ switch(diPort) {
+ case VIA_DI_PORT_DIP0:
+ viaDIP0SetClockSource(pScrn, clockSource);
+ break;
+ case VIA_DI_PORT_DIP1:
+ viaDIP1SetClockSource(pScrn, clockSource);
+ break;
+ default:
+ break;
+ }
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting %s.\n", __func__));
+}
+
void
viaDisplaySource(ScrnInfoPtr pScrn, uint32_t diPort, int index)
{
diff --git a/src/via_sii164.c b/src/via_sii164.c
index f5501f6..3a07085 100644
--- a/src/via_sii164.c
+++ b/src/via_sii164.c
@@ -295,6 +295,7 @@ via_sii164_mode_set(xf86OutputPtr output, DisplayModePtr
mode,
{
ScrnInfoPtr pScrn = output->scrn;
drmmode_crtc_private_ptr iga = output->crtc->driver_private;
+ VIAPtr pVia = VIAPTR(pScrn);
viaSiI164RecPtr pSiI164Rec = output->driver_private;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -305,6 +306,10 @@ via_sii164_mode_set(xf86OutputPtr output, DisplayModePtr
mode,
viaExtTMDSSetDataDriveStrength(pScrn, 0x03);
viaIOPadState(pScrn, pSiI164Rec->diPort, 0x03);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaClockSource(pScrn, pSiI164Rec->diPort, TRUE);
+ }
+
viaSiI164DumpRegisters(pScrn, pSiI164Rec->pSiI164I2CDev);
viaSiI164InitRegisters(pScrn, pSiI164Rec->pSiI164I2CDev);
viaSiI164DumpRegisters(pScrn, pSiI164Rec->pSiI164I2CDev);
diff --git a/src/via_ums.h b/src/via_ums.h
index d406d53..1d37581 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -519,6 +519,25 @@ viaDIP0SetOutputEnable(ScrnInfoPtr pScrn, Bool
outputEnable)
outputEnable ? "Enable" : "Disable"));
}
+/*
+ * Sets the clock source of DIP0 (Digital Interface Port 0)
+ * interface. CLE266 chipset only.
+ */
+static inline void
+viaDIP0SetClockSource(ScrnInfoPtr pScrn, Bool clockSource)
+{
+ /*
+ * 3X5.6C[5] - DIP0 Clock Source
+ * 0: External
+ * 1: Internal
+ */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x6C,
+ clockSource ? BIT(5) : 0x00, BIT(5));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DIP0 Clock Source: %s\n",
+ clockSource ? "Internal" : "External"));
+}
+
/*
* Sets the display source of DIP0 (Digital Interface Port 0)
* interface. CLE266 chipset only.
@@ -580,6 +599,25 @@ viaDIP1SetOutputEnable(ScrnInfoPtr pScrn, Bool
outputEnable)
outputEnable ? "Enable" : "Disable"));
}
+/*
+ * Sets the clock source of DIP1 (Digital Interface Port 1)
+ * interface. CLE266 chipset only.
+ */
+static inline void
+viaDIP1SetClockSource(ScrnInfoPtr pScrn, Bool clockSource)
+{
+ /*
+ * 3X5.93[5] - DIP1 Clock Source
+ * 0: External
+ * 1: Internal
+ */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x93,
+ clockSource ? BIT(5) : 0x00, BIT(5));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DIP1 Clock Source: %s\n",
+ clockSource ? "Internal" : "External"));
+}
+
/*
* Sets the display source of DIP1 (Digital Interface Port 1)
* interface. CLE266 chipset only.
@@ -1685,6 +1723,7 @@ Bool xf86I2CMaskByte(I2CDevPtr d, I2CByte subaddr,
void viaDisplaySource(ScrnInfoPtr pScrn, uint32_t diPort, int index);
void viaIOPadState(ScrnInfoPtr pScrn, uint32_t diPort, uint8_t ioPadState);
void viaOutputEnable(ScrnInfoPtr pScrn, uint32_t diPort, Bool outputEnable);
+void viaClockSource(ScrnInfoPtr pScrn, uint32_t diPort, Bool clockSource);
void viaInitDisplay(ScrnInfoPtr pScrn);
CARD32 ViaGetMemoryBandwidth(ScrnInfoPtr pScrn);
void viaSetUseExternalClock(ScrnInfoPtr pScrn);
diff --git a/src/via_vt1632.c b/src/via_vt1632.c
index b7bb2db..68ed7bc 100644
--- a/src/via_vt1632.c
+++ b/src/via_vt1632.c
@@ -309,6 +309,7 @@ via_vt1632_mode_set(xf86OutputPtr output, DisplayModePtr
mode,
{
ScrnInfoPtr pScrn = output->scrn;
drmmode_crtc_private_ptr iga = output->crtc->driver_private;
+ VIAPtr pVia = VIAPTR(pScrn);
viaVT1632RecPtr pVIAVT1632 = output->driver_private;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -319,6 +320,10 @@ via_vt1632_mode_set(xf86OutputPtr output, DisplayModePtr
mode,
viaExtTMDSSetDataDriveStrength(pScrn, 0x03);
viaIOPadState(pScrn, pVIAVT1632->diPort, 0x03);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaClockSource(pScrn, pVIAVT1632->diPort, TRUE);
+ }
+
viaVT1632DumpRegisters(pScrn, pVIAVT1632->VT1632I2CDev);
viaVT1632InitRegisters(pScrn, pVIAVT1632->VT1632I2CDev);
viaVT1632DumpRegisters(pScrn, pVIAVT1632->VT1632I2CDev);
commit 50b5b95067e63937959db1d43b601a46a380e82a
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Sun Jul 25 19:45:40 2021 -0500
Add viaOutputEnable() to control CLE266 chipset's DIPx output status
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index d2f2ce5..f4c24f3 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -952,6 +952,10 @@ via_fp_prepare(xf86OutputPtr output)
viaFPPower(pScrn, pVia->Chipset, pVIAFP->diPort, FALSE);
viaIOPadState(pScrn, pVIAFP->diPort, 0x00);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaOutputEnable(pScrn, pVIAFP->diPort, FALSE);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting via_fp_prepare.\n"));
}
@@ -969,6 +973,10 @@ via_fp_commit(xf86OutputPtr output)
viaFPPower(pScrn, pVia->Chipset, pVIAFP->diPort, TRUE);
viaIOPadState(pScrn, pVIAFP->diPort, 0x03);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaOutputEnable(pScrn, pVIAFP->diPort, TRUE);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting via_fp_commit.\n"));
}
diff --git a/src/via_output.c b/src/via_output.c
index 7e4b7c1..9528c3b 100644
--- a/src/via_output.c
+++ b/src/via_output.c
@@ -89,6 +89,27 @@ viaIOPadState(ScrnInfoPtr pScrn, uint32_t diPort, uint8_t
ioPadState)
"Exiting %s.\n", __func__));
}
+void
+viaOutputEnable(ScrnInfoPtr pScrn, uint32_t diPort, Bool outputEnable)
+{
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered %s.\n", __func__));
+
+ switch(diPort) {
+ case VIA_DI_PORT_DIP0:
+ viaDIP0SetOutputEnable(pScrn, outputEnable);
+ break;
+ case VIA_DI_PORT_DIP1:
+ viaDIP1SetOutputEnable(pScrn, outputEnable);
+ break;
+ default:
+ break;
+ }
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting %s.\n", __func__));
+}
+
void
viaDisplaySource(ScrnInfoPtr pScrn, uint32_t diPort, int index)
{
diff --git a/src/via_sii164.c b/src/via_sii164.c
index 49e379f..f5501f6 100644
--- a/src/via_sii164.c
+++ b/src/via_sii164.c
@@ -251,6 +251,7 @@ static void
via_sii164_prepare(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
+ VIAPtr pVia = VIAPTR(pScrn);
viaSiI164RecPtr pSiI164Rec = output->driver_private;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -259,6 +260,10 @@ via_sii164_prepare(xf86OutputPtr output)
viaSiI164Power(pScrn, pSiI164Rec->pSiI164I2CDev, FALSE);
viaIOPadState(pScrn, pSiI164Rec->diPort, 0x00);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaOutputEnable(pScrn, pSiI164Rec->diPort, FALSE);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting %s.\n", __func__));
}
@@ -267,6 +272,7 @@ static void
via_sii164_commit(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
+ VIAPtr pVia = VIAPTR(pScrn);
viaSiI164RecPtr pSiI164Rec = output->driver_private;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -275,6 +281,10 @@ via_sii164_commit(xf86OutputPtr output)
viaSiI164Power(pScrn, pSiI164Rec->pSiI164I2CDev, TRUE);
viaIOPadState(pScrn, pSiI164Rec->diPort, 0x03);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaOutputEnable(pScrn, pSiI164Rec->diPort, TRUE);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting %s.\n", __func__));
}
diff --git a/src/via_ums.h b/src/via_ums.h
index c8abf69..d406d53 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -500,6 +500,25 @@ viaDIP0SetIOPadState(ScrnInfoPtr pScrn, CARD8 ioPadState)
"Off"));
}
+/*
+ * Output enable of DIP0 (Digital Interface Port 0) interface.
+ * CLE266 chipset only.
+ */
+static inline void
+viaDIP0SetOutputEnable(ScrnInfoPtr pScrn, Bool outputEnable)
+{
+ /*
+ * 3X5.6C[0] - DIP0 Output Enable
+ * 0: Output Disable
+ * 1: Output Enable
+ */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x6C,
+ outputEnable ? 0x01 : 0x00, BIT(0));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DIP0 Output: %s\n",
+ outputEnable ? "Enable" : "Disable"));
+}
+
/*
* Sets the display source of DIP0 (Digital Interface Port 0)
* interface. CLE266 chipset only.
@@ -542,6 +561,25 @@ viaDIP1SetIOPadState(ScrnInfoPtr pScrn, CARD8 ioPadState)
"Off"));
}
+/*
+ * Output enable of DIP1 (Digital Interface Port 1) interface.
+ * CLE266 chipset only.
+ */
+static inline void
+viaDIP1SetOutputEnable(ScrnInfoPtr pScrn, Bool outputEnable)
+{
+ /*
+ * 3X5.93[0] - DIP1 Output Enable
+ * 0: Output Disable
+ * 1: Output Enable
+ */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x93,
+ outputEnable ? 0x01 : 0x00, BIT(0));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DIP1 Output: %s\n",
+ outputEnable ? "Enable" : "Disable"));
+}
+
/*
* Sets the display source of DIP1 (Digital Interface Port 1)
* interface. CLE266 chipset only.
@@ -1646,6 +1684,7 @@ Bool xf86I2CMaskByte(I2CDevPtr d, I2CByte subaddr,
/* via_output.c */
void viaDisplaySource(ScrnInfoPtr pScrn, uint32_t diPort, int index);
void viaIOPadState(ScrnInfoPtr pScrn, uint32_t diPort, uint8_t ioPadState);
+void viaOutputEnable(ScrnInfoPtr pScrn, uint32_t diPort, Bool outputEnable);
void viaInitDisplay(ScrnInfoPtr pScrn);
CARD32 ViaGetMemoryBandwidth(ScrnInfoPtr pScrn);
void viaSetUseExternalClock(ScrnInfoPtr pScrn);
diff --git a/src/via_vt1632.c b/src/via_vt1632.c
index 625a57e..b7bb2db 100644
--- a/src/via_vt1632.c
+++ b/src/via_vt1632.c
@@ -265,6 +265,7 @@ static void
via_vt1632_prepare(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
+ VIAPtr pVia = VIAPTR(pScrn);
viaVT1632RecPtr pVIAVT1632 = output->driver_private;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -273,6 +274,10 @@ via_vt1632_prepare(xf86OutputPtr output)
viaVT1632Power(pScrn, pVIAVT1632->VT1632I2CDev, FALSE);
viaIOPadState(pScrn, pVIAVT1632->diPort, 0x00);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaOutputEnable(pScrn, pVIAVT1632->diPort, FALSE);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting %s.\n", __func__));
}
@@ -281,6 +286,7 @@ static void
via_vt1632_commit(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
+ VIAPtr pVia = VIAPTR(pScrn);
viaVT1632RecPtr pVIAVT1632 = output->driver_private;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -289,6 +295,10 @@ via_vt1632_commit(xf86OutputPtr output)
viaVT1632Power(pScrn, pVIAVT1632->VT1632I2CDev, TRUE);
viaIOPadState(pScrn, pVIAVT1632->diPort, 0x03);
+ if (pVia->Chipset == VIA_CLE266) {
+ viaOutputEnable(pScrn, pVIAVT1632->diPort, TRUE);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting %s.\n", __func__));
}
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