On Tue, Sep 15, 2026 at 12:03 PM Trevor Gamblin <[email protected]> wrote:
> gcc reports the following extension string for '-march=rva32u64': > > |tgamblin@megalith > ~/workspace/ypbuilds/poky-qemuriscv64/layers/openembedded-core (master)$ > riscv64-linux-gnu-gcc -march=rva23u64 -mabi=lp64d -Q --help=target | grep > rv64 > | -march= > > rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ziccrse_zicntr_zicond_zicsr_zihintntl_zihintpause_zihpm_zimop_zmmul_za64rs_zaamo_zalrsc_zawrs_zfa_zfhmin_zca_zcb_zcd_zcmop_zba_zbb_zbs_zkt_zvbb_zve32f_zve32x_zve64d_zve64f_zve64x_zvfhmin_z > > Add the following extensions to complete the profile: > > - zawrs > - zcb > - zcmop > - zfa > - zicond > - zihintntl > - zihpm > - zimop > - zvbb > - zve32f > - zve32x > - zve64d > - zve64f > - zve64x > commit message: says -march=rva32u64 (typo), and its bullet list omits zvfhmin zvkb zvkt zvl32b zvl64b zvl128b supm which the patch does add. > > Signed-off-by: Trevor Gamblin <[email protected]> > --- > .../conf/machine/include/riscv/arch-riscv.inc | 84 +++++++++++++++++++ > 1 file changed, 84 insertions(+) > > diff --git a/meta/conf/machine/include/riscv/arch-riscv.inc > b/meta/conf/machine/include/riscv/arch-riscv.inc > index c05cdf8c21..e60b88fe44 100644 > --- a/meta/conf/machine/include/riscv/arch-riscv.inc > +++ b/meta/conf/machine/include/riscv/arch-riscv.inc > @@ -118,6 +118,10 @@ TUNEVALID[zicntr] = "Cycle and instruction counting > for profiling extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zicntr", > "_zicntr", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zicntr", > "_zicntr", "", d)}" > > +TUNEVALID[zicond] = "Conditional zeroing operations extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zicond", > "_zicond", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zicond", > "_zicond", "", d)}" > + > TUNEVALID[zicsr] = "Control and status register access extension" > TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zicsr f > d", "_zicsr", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zicsr f > d", "_zicsr", "", d)}" > @@ -126,10 +130,22 @@ TUNEVALID[zifencei] = "Instruction-fetch fence > extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zifencei", > "_zifencei", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zifencei", > "_zifencei", "", d)}" > > +TUNEVALID[zihintntl] = "Non-temporal locality hints extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zihintntl", > "_zihintntl", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zihintntl", > "_zihintntl", "", d)}" > + > TUNEVALID[zihintpause] = "Pause hint extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zihintpause", > "_zihintpause", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", > "zihintpause", "_zihintpause", "", d)}" > > +TUNEVALID[zihpm] = "Hardware performance counters extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zihpm", > "_zihpm", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zihpm", > "_zihpm", "", d)}" > + > +TUNEVALID[zimop] = "Hardware performance counters extension." > copy/paste from zihpm. Should be May-Be-Operations. > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zimop", > "_zimop", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zimop", > "_zimop", "", d)}" > + > TUNEVALID[zmmul] = "Cheaper M subset (mul only) extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "m zmmul", > "_zmmul", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "m zmmul", > "_zmmul", "", d)}" > @@ -150,6 +166,14 @@ TUNEVALID[zalrsc] = "Extended LR/SC semantics > extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "a zalrsc", > "_zalrsc", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "a zalrsc", > "_zalrsc", "", d)}" > > +TUNEVALID[zawrs] = "Wait-on-reservation-set instructions extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zawrs", > "_zawrs", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zawrs", > "_zawrs", "", d)}" > + > +TUNEVALID[zfa] = "Additional floating point instructions extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zfa", "_zfa", > "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zfa", > "_zfa", "", d)}" > + > TUNEVALID[zfhmin] = "Minimal half-precision floating point extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zfhmin", > "_zfhmin", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zfhmin", > "_zfhmin", "", d)}" > @@ -158,10 +182,18 @@ TUNEVALID[zca] = "Compressed base integer ops > extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "c zca", > "_zca", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "c zca", > "_zca", "", d)}" > > +TUNEVALID[zcb] = "Extra compressed integer ops extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zcb", "_zcb", > "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zcb", > "_zcb", "", d)}" > + > TUNEVALID[zcd] = "16-bit encodings for 64-bit FP extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zcd", "_zcd", > "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zcd", > "_zcd", "", d)}" > > +TUNEVALID[zcmop] = "Compressed may-be-ops extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zcmop", > "_zcmop", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains("TUNE_FEATURES", "zcmop", > "_zcmop", "", d)}" > + > TUNEVALID[zba] = "Address bit manipulation extension" > TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zba", > "_zba", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zba", > "_zba", "", d)}" > @@ -182,6 +214,58 @@ TUNEVALID[zkt] = "Data-independent execution latency > extension." > TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zkt", > "_zkt", "", d)}" > TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zkt", > "_zkt", "", d)}" > > +TUNEVALID[zvbb] = "Vector basic bit-manipulation extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvbb", > "_zvbb", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvbb", > "_zvbb", "", d)}" > + > +TUNEVALID[zve32f] = "Embedded vector computation (32-bit integer, 32-bit > FP) extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zve32f", > "_zve32f", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zve32f", "_zve32f", "", d)}" > + > +TUNEVALID[zve32x] = "Embedded vector computation (32-bit integer) > extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zve32x", > "_zve32x", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zve32x", "_zve32x", "", d)}" > + > +TUNEVALID[zve64d] = "Embedded vector computation (64-bit integer, 64-bit > FP) extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zve64d", > "_zve64d", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zve64d", "_zve64d", "", d)}" > + > +TUNEVALID[zve64f] = "Embedded vector computation (64-bit integer, 32-bit > FP) extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zve64f", > "_zve64f", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zve64f", "_zve64f", "", d)}" > + > +TUNEVALID[zve64x] = "Embedded vector computation (64-bit integer) > extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zve64x", > "_zve64x", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zve64x", "_zve64x", "", d)}" > + > +TUNEVALID[zvfhmin] = "Vector half-precision minimal extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvfhmin", > "_zvfhmin", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zvfhmin", "_zvfhmin", "", d)}" > + > +TUNEVALID[zvkb] = "Vector cryptography bit-manipulation extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvkb", > "_zvkb", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvkb", > "_zvkb", "", d)}" > + > +TUNEVALID[zvkt] = "Vector data independent execution latency extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvkt", > "_zvkt", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvkt", > "_zvkt", "", d)}" > + > +TUNEVALID[zvl128b] = "Minimum vector length standard extensions > (128-bit)." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvl128b", > "_zvl128b", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zvl128b", "_zvl128b", "", d)}" > + > +TUNEVALID[zvl32b] = "Minimum vector length standard extensions (32-bit)." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvl32b", > "_zvl32b", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zvl32b", "_zvl32b", "", d)}" > + > +TUNEVALID[zvl64b] = "Minimum vector length standard extensions (64-bit)." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "zvl64b", > "_zvl64b", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", > "zvl64b", "_zvl64b", "", d)}" > + > +TUNEVALID[supm] = "User-mode pointer masking extension." > +TUNE_RISCV_MARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "supm", > "_supm", "", d)}" > +TUNE_RISCV_PKGARCH .= "${@bb.utils.contains_any("TUNE_FEATURES", "supm", > "_supm", "", d)}" > + > # Construct TUNE_CCARGS > # This should result in a CCARG similar to: > # -march=rv32imac -mabi=ilp32 > -- > 2.55.0 > >
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