QB_CPU defaults to rva23s64, which mandates V, but linux-yocto only enables CONFIG_RISCV_ISA_V when TUNE_FEATURES contains 'v', and riscv-isa-clear.scc turns it off otherwise. With the default rv64gc tune the kernel therefore runs without V support and any userspace vector instruction raises SIGILL, even code that selects RVV at runtime.
Append riscv-isa-v.scc to KERNEL_FEATURES_RISCV so it lands after riscv-isa-clear.scc. Userspace keeps the rv64gc tune and stays portable; the kernel detects V at boot, so this is harmless on CPUs without it. Signed-off-by: Khem Raj <[email protected]> --- meta/conf/machine/qemuriscv64.conf | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/meta/conf/machine/qemuriscv64.conf b/meta/conf/machine/qemuriscv64.conf index a753af0576..0aacfa378f 100644 --- a/meta/conf/machine/qemuriscv64.conf +++ b/meta/conf/machine/qemuriscv64.conf @@ -6,6 +6,11 @@ require conf/machine/include/riscv/qemuriscv.inc XVISOR_PLAT = "riscv/virt64" +# The default QB_CPU (rva23s64) has the Vector extension, so enable it in the +# kernel even though the default tune is rv64gc, userspace can then use V at +# runtime. Appending here places it after riscv-isa-clear.scc, which disables V. +KERNEL_FEATURES_RISCV:append = " arch/riscv/tunes/riscv-isa-v.scc" + EXTRA_IMAGEDEPENDS += "u-boot" UBOOT_MACHINE = "qemu-riscv64_smode_defconfig" UBOOT_ELF = "u-boot"
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