chas> i had a similar problem on the altix platform with posted
chas> writes. part of the hw init was to write the reset
chas> register, wait a few ticks, and then read the register until
chas> you saw a flag clear. reading the device "too soon" failed
chas> because it was in some poor state that didnt respond
chas> properly. with posted writes, you needed to force out the
chas> writes (not using read obviously) and then wait the
chas> appropriate time.
How do you force out writes without doing a read? I don't know of any
other way to flush writes that is guaranteed by the PCI spec.
In any case that doesn't seem to be the problem here: the read is
supposed to be done first, even in the source code.
- R.
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