Hi, On 20/03/2008, Salil Bijur <[EMAIL PROTECTED]> wrote: > I noticed the code in qemu-neo1973 to set external interrupts via gpio pins. > > switch ((s->extint[e] >> (line * 3)) & 7) > This check assumes that the EINTn register has contiguous sets of 3 > bits for signalling method [0-2, 3-5, 6-8, etc]. > > But I took a look at the user manual of s3c2410 and it seems to be > different. There are sets of 3 bits followed by a reserved bit so the > signalling methods are in bits [0-2, 4-6, 8-10, etc.].
Ah, correct. Sorry for late response, I'd been travelling at that time and later catching up with mail in a hurry so I missed some mails. > > Attaching a patch that hopefully corrects this. Thanks, your second version is applied in r4329. -- Please do not print this email unless absolutely necessary. Spread environmental awareness.
