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Somebody in the thread at some point said:
> Maybe our next move should be to try 72Hz refresh by removing the
> needless blanking pixels from the frame and keeping everything else the
> same, if the LCM creates the flicker at some integer number of frames
> then we will increase the flicker frequency accordingly, maybe it will
> be less objectionable or transformed some other way.
I have done this in U-Boot with the attached patch, which provides 75Hz
refresh and the flicker is no longer visible on the 0xa00a 5:6:5 pattern.
Allen or anyone else please try the patch and see what you think.
- -Andy
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debug-flicker.patch
From: Andy Green <[EMAIL PROTECTED]>
Bunch of meddlings to U-Boot video init that increases framerate to 72Hz
amongst many other experimental LCM things. Seems to remove the flicker issue.
Signed-off-by: Andy Green <[EMAIL PROTECTED]>
---
board/neo1973/common/jbt6k74.c | 24 +++++++++++++-----------
drivers/video/smedia3362.c | 15 +++++++++++----
2 files changed, 24 insertions(+), 15 deletions(-)
diff --git a/board/neo1973/common/jbt6k74.c b/board/neo1973/common/jbt6k74.c
index e4c0332..10db3d3 100644
--- a/board/neo1973/common/jbt6k74.c
+++ b/board/neo1973/common/jbt6k74.c
@@ -228,11 +228,12 @@ static int jbt_init_regs(struct jbt_info *jbt)
rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
- rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
- rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
- rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
- rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
- rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x00 /*0x56*/);
+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x00 /*0x33*/);
+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x22 /*0x11*/);
+ rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x22 /*0x11*/);
+// rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
+ rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x00 /*0x02*/);
rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
@@ -249,21 +250,22 @@ static int jbt_init_regs(struct jbt_info *jbt)
rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
- rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
- rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
+ rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x3343);
+ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x44 /*0x00*/);
+ rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x33 /*0x00*/);
rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
- rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
+ rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0); /* 496 */
rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
- rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
+ rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x00 /*0x01*/);
rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
- rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
- rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
+ rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x050a /*0x0d0e*/);
+ rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x2864 /*0x11a4*/);
rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
#if 0
diff --git a/drivers/video/smedia3362.c b/drivers/video/smedia3362.c
index 170723f..81e2bd1 100644
--- a/drivers/video/smedia3362.c
+++ b/drivers/video/smedia3362.c
@@ -80,10 +80,10 @@ void smedia3362_lcm_reset(int b)
* framebuffer
*/
static u16 u16a_lcd_init[] = {
- 0x0020, 0x1020, 0x0B40, 0x01E0, 0x0280, 0x440C, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0000, 0x0258, 0x0000,
- 0x0000, 0x0000, 0x0008, 0x0000, 0x0010, 0x0000, 0x01F0, 0x0000,
- 0x0294, 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0x0004, 0x0000,
+ 0x1020 /* 0020 */, 0x1020, 0x0B40, 0x01E0, 0x0280, 0x440C, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0000, 496 /*0x0258*/, 0x0000,
+ 0x0000, 0x0000, 0x0008, 0x0000, 0x0010, 0x0000, 480+0x10, 0x0000,
+ 0x0288, 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0x0004, 0x0000,
0x0284, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
@@ -202,6 +202,13 @@ static void glamo_core_init(void)
for (bp = 0; bp < ARRAY_SIZE(u16a_lcd_init); bp++)
glamo_reg_write(GLAMO_REGOFS_LCD + (bp << 1),
u16a_lcd_init[bp]);
+
+ /* drive strength */
+ glamo_reg_write(GLAMO_REGOFS_LCD + 0x160, 0x3000);
+
+ /* gamma = 1 */
+ glamo_reg_write(GLAMO_REGOFS_LCD + 0x100, 0x0015);
+
glamofb_cmd_mode(0);
}
