Andy Green wrote: > I read the datasheets (we have two now) for lis302dl again before > writing that last mail and I did not find an explanation for what clears > the interrupt source in hardware there.
The description of the LIR bit in FF_WU_CFG_1 suggests what may be the mechanism: | Latch Interrupt request into FF_WU_SRC reg with the FF_WU_SRC reg | cleared by reading FF_WU_SRC_1 reg. Default value: 0 A possible model may be that interrupt-worthy events are signaled as edges inside the accelerometer, and that LIR has to be set to turn them into something a level-triggering CPU can digest. If the GPIO is configured to edge-triggered, it may be interesting to see if things improve if LIR is cleared. (That's from the October 2008 data sheet. Didn't check the others. I think we actually have three - Dkay had a really ancient one ;-) - Werner
