On Sun, 16 Nov 2008 10:51:21 -0200 Werner Almesberger <[EMAIL PROTECTED]> wrote:
> Andy Green wrote: > > I read the datasheets (we have two now) for lis302dl again before > > writing that last mail and I did not find an explanation for what > > clears the interrupt source in hardware there. > > The description of the LIR bit in FF_WU_CFG_1 suggests what may be the > mechanism: > > | Latch Interrupt request into FF_WU_SRC reg with the FF_WU_SRC reg > | cleared by reading FF_WU_SRC_1 reg. Default value: 0 > > A possible model may be that interrupt-worthy events are signaled as > edges inside the accelerometer, and that LIR has to be set to turn > them into something a level-triggering CPU can digest. If the GPIO > is configured to edge-triggered, it may be interesting to see if > things improve if LIR is cleared. Well, we don't set the LIR bit when configuring FF_WU_CFG. It's also not used for "normal" data-ready interrupts, only with the threshold stuff. So it's already cleared :-) I think the lockups with the earlier edge-triggered implementation was solved in practice with the bitbang-all-the-way and hopefully now in theory as well with the level-triggered interrupt. // Simon
