Hi,
can anyone correct my understanding( if I am wrong) of the following function?
This function should bring MIPS processor into debug mode .
It sets bit 3 of
EJTAG_INST_CONTROL register.
> int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
> {
> uint32_t ejtag_ctrl;
The command causes that we will work with EJTAG_INST_CONTROL register( writes into
instruction register)
> mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
set debug break bit . But what value must have
ejtag_info->ejtag_ctrl ??
> ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
write the debug break bit into data register
> mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
>
But what will this command do??What value will
ejtag_info->ejtag_ctrl have ?
> ejtag_ctrl = ejtag_info->ejtag_ctrl;
write into data register
> mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
let's log the result
> LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
bit 3
EJTAG_CTRL_BRKST
must be set otherwise we are not in debug mode
> if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
> {
> LOG_ERROR("Failed to enter Debug Mode!");
> return ERROR_FAIL;
> }
>
> return ERROR_OK;
Ia my understanding correct? And can anyone answer those 2 my questions
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