On Tue, Mar 13, 2012 at 1:31 PM, simonqian.openocd
<simonqian.open...@gmail.com> wrote:
> About error handler of SWD, I think it's much easier to put the retry code
> in SWD driver.

Guys, you made me realize that I am working on something far more
complex than might be necessary at the moment, and the most important
thing is to make SWD work, thanks! ;-) If the efficiency is not the
issue, for this moment I have abandoned the sophisticated queueing and
error handling, instead we simply wait for the result and handle
exceptional situations (ACK=WAIT), just as Simon did in the Versaloon
driver (which is the simplest choice and its working). I have placed
execution in DP_READ, AP_READ, DP_WRITE and AP_WRITE, so the possible
ACK=WAIT are handled right away for the time required to perform all
operations over the MPSEE and USB channel...

> flash probe 0
device id = 0x10016414
flash size = 512kbytes
device id = 0x10016414
flash size = 512kbytes
flash 'stm32x' found at 0x08000000
> flash write_image erase unlock toggle.bin 0x08000000 bin
auto erase enabled
auto unlock enabled
aligned end protect sector to a 2 sector boundary
wrote 2048 bytes from file toggle.bin in 147.749420s (0.014 KiB/s)

This is not the speed demon (verbose output might slow things down?)
but its good for implementing the common SWD API in current OpenOCD
code. The rest could be done by the driver. Anyway I still think it
would be better to have generic functions to prepare transfer, perform
transfer and handle possible errors in each layer - so ARM ADI would
countain MEM-AP setup, MEM-AP read/write, possible retries - this
would make transport implementation far more easier. Also this is the
ADI/MEM-AP task to handle errors, Transport should only replace
commands/queue elements into bistream for an interface, as there might
be other AP to handle differently - then we would create new target
driver instead modifying transport code... My fork also has "bitbang"
and "transfer" functions added to the Interface Driver API so they can
be also used by any other transport/interface and/or dedicated
memory/bus/target code (i.e. 1wire, SPI, I2C, ...) in a straight
generic way, I propose it becomes part of the new API :-)

Best regards! :-)
Tomek

-- 
CeDeROM, SQ7MHZ, http://www.tomek.cedro.info

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