CeDeROM, SQ7MHZ, http://www.tomek.cedro.info
On Mar 14, 2012 9:09 AM, "simonqian.openocd" <simonqian.open...@gmail.com>
wrote:
>
> Let's start from the most common points of view and make some most safe
modifications first.
Agree :-)
> I think the first thing can be done safely is to remove jtag_add_reset,
in adi and cortex codes.
> There is no check for the current transport, and take JTAG as default.
> And if jtag_add_reset is called, there is chances that TLR reset will be
used, which is not available in SWD mode.
Agree :-) reset/run does not work for me yet neither :-)
> We can add queue_reset function in dap_ops, and implement reset method
in adi_jtag and adi_swd.
> Or we can simply add a function to handle reset in arm_adi_v5.c code.
I would prefer to create dedicated reset function in arm_adi_v5 if possible
to use existing dp/ap read/write functions, to keep dap_ops interface
functions as compact as possible, but if thats not possible the additional
member of dap_ops seems unavoidable :-)
Do you need my support in this Simon? I would prefer to clean up the
existing code and prepare for merge into openocd master, then still work on
queueing mechanism / retry on existing queue to bring speed into reasonable
level better than presented (what it the avg speed of versaloon btw?).. but
if there are any more important tasks just let me know and Im here to help
:-)
Best regards! :-)
Tomek
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