This is an automated email from Gerrit.

Hsiangkai Wang ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/1328

-- gerrit

commit 70b08005e09a3cbe25564c0b5915c5016de8ab47
Author: Hsiangkai <[email protected]>
Date:   Thu Apr 11 11:04:24 2013 +0800

    nds32: add new command "nds word_access_mem [on|off]"
    
    There are some devices only accept word-aligned access.
    NDS32 provides an option to turn on/off word-aligned memory access.
    If the option is turned on, target will read memory through word-aligned
    address even the access size is 1 byte.
    
    Change-Id: I8a1bdda14081e0f24c164f81e1159d0bf1c846fa
    Signed-off-by: Hsiangkai <[email protected]>

diff --git a/src/target/nds32.c b/src/target/nds32.c
index 6b8f838..1693b4b 100644
--- a/src/target/nds32.c
+++ b/src/target/nds32.c
@@ -1742,6 +1742,7 @@ int nds32_init_arch_info(struct target *target, struct 
nds32 *nds32)
        nds32->boot_time = 1500;
        nds32->reset_halt_as_examine = false;
        nds32->keep_target_edm_ctl = false;
+       nds32->word_access_mem = false;
        nds32->virtual_hosting = false;
        nds32->hit_syscall = false;
        nds32->active_syscall_id = NDS32_SYSCALL_UNDEFINED;
diff --git a/src/target/nds32.h b/src/target/nds32.h
index 0b37cae..9e1858a 100644
--- a/src/target/nds32.h
+++ b/src/target/nds32.h
@@ -316,6 +316,9 @@ struct nds32 {
        /** backup/restore target EDM_CTL value. As debugging target debug 
handler, it should be true. */
        bool keep_target_edm_ctl;
 
+       /** always use word-aligned address to access memory */
+       bool word_access_mem;
+
        /** EDM passcode for debugging secure MCU */
        char *edm_passcode;
 
diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c
index bf51771..4b8119f 100644
--- a/src/target/nds32_cmd.c
+++ b/src/target/nds32_cmd.c
@@ -494,6 +494,26 @@ COMMAND_HANDLER(handle_nds32_decode_command)
        return ERROR_OK;
 }
 
+COMMAND_HANDLER(handle_nds32_word_access_mem_command)
+{
+       struct target *target = get_current_target(CMD_CTX);
+       struct nds32 *nds32 = target_to_nds32(target);
+
+       if (!is_nds32(nds32)) {
+               command_print(CMD_CTX, "current target isn't an Andes core");
+               return ERROR_FAIL;
+       }
+
+       if (CMD_ARGC > 0) {
+               if (strcmp(CMD_ARGV[0], "on") == 0)
+                       nds32->word_access_mem = true;
+               if (strcmp(CMD_ARGV[0], "off") == 0)
+                       nds32->word_access_mem = false;
+       }
+
+       return ERROR_OK;
+}
+
 COMMAND_HANDLER(handle_nds32_query_target_command)
 {
        struct target *target = get_current_target(CMD_CTX);
@@ -917,6 +937,13 @@ static const struct command_registration 
nds32_exec_command_handlers[] = {
                .help = "decode instruction.",
        },
        {
+               .name = "word_access_mem",
+               .handler = handle_nds32_word_access_mem_command,
+               .mode = COMMAND_ANY,
+               .usage = "['on'|'off']",
+               .help = "Always use word-aligned address to access memory.",
+       },
+       {
                .name = "bulk_write",
                .jim_handler = jim_nds32_bulk_write,
                .mode = COMMAND_EXEC,

-- 

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