Hi Nick, I had the same problem with two Kinetis K20 CPUs with a common reset line. To program them, I had to remove the cortex_m3 reset configuration line from the K20.cfg file. This re-instates direct control of the /reset line to openOCD. If this is not done, the cpu will reset itself upon executing invalid instructions or a watchdog timeout! This should also solve your "initial flash" problem.
In my case, I even need to upload and execute my own flash routines to the two processors simultaneously, otherwise one CPU will reset the other during programming. I don't see a way to program two CPUs simultaneously using openOCD's built-in flash system. After loading valid code into the flash, the previous cortex_m3 reset configuration will work as there are no invalid instructions to cause a self-reset. openOCD 0.8.0 rc1 still has issues with programming two Kinetis CPUs on a common JTAG bus; when two flash components are defined, the second cannot be accessed/programmed properly. Verification fails. I'm not sure where the problem lies. It does work when the flash component of the first CPU is omitted. Switching destination CPU thus requires restarting openOCD at the moment. Regards, Niels. ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
