Thanks Paul for advice. Overriding ocd_process_reset_inner is a bit
hackish but works.
I have two more questions:
PSoC needs SWD line reset sequence after XRES (nSRST) deasserting.
I added a quirk mode to target/cortex_m.c.
Is there a better way to send it than this?
#include <jtag/swd.h>
extern struct jtag_interface *jtag_interface;
static int cortex_m_deassert_reset(struct target *target)
{
...
const struct swd_driver *swd = jtag_interface->swd;
assert(swd);
swd->switch_seq(swjdp, LINE_RESET);
}
--------------------------------------
And second one: how to read pc register in tcl?
set pc_value [reg pc]
does not work.
Thanks
Tom
On 4.9.2014 12:50, Paul Fertser wrote:
> Hi,
>
> On Thu, Sep 04, 2014 at 12:01:57PM +0200, Tomas Vanek wrote:
>> Thank you for a good and useful freeware project.
> Not only freeware but also Free Software.
>
>> I'm working on support for Cypress PSoC 4. These chips have Cortex M0 CPU
>> and SWD debugging interface, so OpenOCD almost works.
> Sounds great!
>
>> mww 0x40030014 0x80000000 # TEST_MODE flag activate
>> psoc4.cpu arp_reset assert 0
>> psoc4.cpu arp_reset deassert 0
> If you're certain this won't work with 1, then I'm afraid I do not
> have any good suggestion here. Probably overriding the whole ocd_reset
> procedure.
>
> I hope someone else will come up with a better idea.
>
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