Hi there,
I appear to have found a bug with the address translation in
armv7a_mmu_translate_va().
See,
http://repo.or.cz/w/openocd.git/blob/HEAD:/src/target/armv7a.c#l168
The decoding of the translation tables appears to be following the rules
for ARM9, not ARM v7A. For example, the code attempts to decode fine/coarse
pages - but these only exist on ARM9. These 1 KB fine pages mean that what
I see on my board (a Cortex A9) isn't what my gdb sees! v7 only supports 16
MB, 1 MB, 64 KB and 4 KB sizes.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0198e/I310474.html
I can't link the equivalent page for ARMv7 as it's PDF-only but see the
architecture reference manual page ~1324.
Anyway the interpretation of the bottom bit of the second-level entry as
1/4 KB means this function gives the wrong VA->PA translation. The bottom
bit should be XN (no execute) on this architecture.
I'd submit a patch, but as I'm unfamiliar with the code base I'm unsure of
where other instances of this decoding may be! Also I haven't much
experience with the 16 MB or 64 KB nor the PAE support (here detected as a
switch in the first level tables as coarse/fine not PXN) so would only be
comfortable patching my issue.
Cheers,
Simon
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