Andreas,
Most of the work in patches already pushed were done to enhance stability of
openocd support of the MIPS cores. Beside adding support for MIPS microAptiv, I
have been using a new version of Bus Blaster probe and found I needed more
debug messages and added code to clean up after failures.
As for your question about current files:
./src/target/mips32_dmaacc.c – supports cores that have implemented ejtag dma.
(As far as I know, no core supports this feature)
./src/target/mips32.c – supports generic core commands
(reading/writing configuration registers), high level functions
(reading/writing core regs)
./src/target/mips32_pracc.c – supports lower level function that access the
ejtag probe memory, like writing asm instruction to dump registers and return
results.
./src/target/mips_ejtag.c – supports access to ejtag probe functions,
like setting fastdata load mode.
./src/target/mips_m4k.c – supports m4k core. For example, polling for
core state, setting/removing breaks, assert/deassert reset and reading/writing
memory.
New mips_common.c – would contain generic functions like polling
for core state, single stepping, etc which would be common to both m4k and
microAptiv.
The mips_m4k.c and
mips_microAptiv.c would contain code to support setting and removing
breakpoints. GDB (tools from
Mentor Graphics Sourcery
Code Bench Lite) sends a different breakpoints kinds (see details below) for
MIPS16, MIPS32 and microMips.
I decided to separate
breakpoint support as not to muddy the waters with microMips support.
E.6.2.2 MIPS Breakpoint Kinds
These breakpoint kinds are defined for the ‘Z0’ and ‘Z1’ packets.
2 16-bit MIPS16 mode breakpoint.
3 16-bit microMIPS mode breakpoint.
4 32-bit standard MIPS mode breakpoint.
5 32-bit microMIPS mode breakpoint.
I hope that I have answered your questions and if you need more details or have
other questions, please let me know.
Kent
From: [email protected] [mailto:[email protected]] On Behalf Of
Andreas Fritiofson
Sent: Saturday, October 25, 2014 3:19 AM
To: Kent Brinkley
Cc: [email protected]
Subject: Re: [OpenOCD-devel] Support of MIPS microAptiv cores
On Fri, Oct 17, 2014 at 9:17 PM, Kent Brinkley
<[email protected]<mailto:[email protected]>> wrote:
Hi All,
I wanted to get some feedback on releasing support for the Mips microAptiv uC
and uP (m14k and m14kc) cores before pushing it out. In order to leverage off
the existing m4k code base, I am looking a creating a mips_common.c which will
contain common functions to both m4k and m14 cores. This is based on similar
work done to support the arm7 and arm9 cores. I would create the m14k
(microAptiv) target which would contain only the necessary functions to
support the m14k and use the functions in common to support common
functionality between both core. My main concern this the current mips4k.c
source would have a major reduction of code this make for a large patch. So is
this going to be a big deal or is this acceptable?
There are not many active developers that know their way around the Mips code
in OpenOCD, unfortunately. There are already several Mips related files in the
source tree. To ease our understanding and make review easier, could you
explain what the current files are responsible for and their relation. I kind
of thought that mips32.c already implemented the common functionality shared
between different cores, like your proposed mips_common.c, but maybe that's not
the case.
./src/target/mips32_dmaacc.c
./src/target/mips32.c
./src/target/mips32_pracc.c
./src/target/mips_ejtag.c
./src/target/mips_m4k.c
How would the relations change if you split parts of mips_m4k.c into
mips_common.c and added a new mips_m14k.c?
Also, we have a fair number of Mips related changes on hold in Gerrit. It would
be good if you could check if any of them overlap or conflict with your
proposal or if they all are orthogonal.
/Andreas
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