Hi Nader
On Sat, 31 Jan 2015 11:34:56 -0800, Nader wrote:
> - My quick observation, not sure why an M4 loader should not work, if
> it is instruction backward compatible.
All Cortex-M4 and Cortex-M4F instructions work on the Cortex-M7.
> - It might need a new type of reset to enable flash download, for
> some reason the PC gets stuck at 0xfffffffe
Uhm, sounds like your Flash-memory is filled with 0xffffffff (erased
successfully, but no data written).
> target state: halted
> target halted due to debug-request, current mode: Thread
> xPSR: 0x01000000 pc: 0xfffffffe msp: 0xfffffffc, semihosting
> Error: flash write algorithm aborted by target
> Error: error executing stm32x flash write algorithm
> Error: flash write failed = 00000040
> Error: error writing to flash at address 0x08000000 at offset 0x00000000
This looks like the PGPERR bit in the FLASH_SR was set. Info from RM0090,
section 3.9.6:
PGPERR - Programming parallelism error
Set by hardware when the size of the access (byte, half-word,
word, double word) during the
program sequence does not correspond to the parallelism
configuration PSIZE (x8, x16, x32, x64).
Cleared by writing 1.
Love
Jens
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