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Evan Hunter ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/2885

-- gerrit

commit 9c2298582fdf00415be95c0579c799789e2752ce
Author: Evan Hunter <[email protected]>
Date:   Wed Jul 22 14:47:00 2015 +0100

    tcl : Rename target/lpc4350 -> lpc43xx in preparation for usage with LPC4330
    
    Change-Id: Id915ea614791a6af298da53283321b63238c410c
    Signed-off-by: Evan Hunter <[email protected]>

diff --git a/tcl/board/diolan_lpc4350-db1.cfg b/tcl/board/diolan_lpc4350-db1.cfg
index 8135bae..a7fc121 100644
--- a/tcl/board/diolan_lpc4350-db1.cfg
+++ b/tcl/board/diolan_lpc4350-db1.cfg
@@ -5,4 +5,4 @@
 
 set CHIPNAME lpc4350
 
-source [find target/lpc4350.cfg]
+source [find target/lpc43xx.cfg]
diff --git a/tcl/board/lpc4350_spifi_generic.cfg 
b/tcl/board/lpc4350_spifi_generic.cfg
index a529c19..36793c1 100644
--- a/tcl/board/lpc4350_spifi_generic.cfg
+++ b/tcl/board/lpc4350_spifi_generic.cfg
@@ -6,7 +6,7 @@
 
 set CHIPNAME lpc4350
 
-source [find target/lpc4350.cfg]
+source [find target/lpc43xx.cfg]
 
 #A large working area greatly reduces flash write times
 set _WORKAREASIZE 0x2000
diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
deleted file mode 100644
index fae54f7..0000000
--- a/tcl/target/lpc4350.cfg
+++ /dev/null
@@ -1,61 +0,0 @@
-source [find target/swj-dp.tcl]
-
-adapter_khz 500
-
-if { [info exists CHIPNAME] } {
-       set _CHIPNAME $CHIPNAME
-} else {
-       set _CHIPNAME lpc4350
-}
-
-#
-# M4 JTAG mode TAP
-#
-if { [info exists M4_JTAG_TAPID] } {
-       set _M4_JTAG_TAPID $M4_JTAG_TAPID
-} else {
-       set _M4_JTAG_TAPID 0x4ba00477
-}
-
-#
-# M4 SWD mode TAP
-#
-if { [info exists M4_SWD_TAPID] } {
-       set _M4_SWD_TAPID $M4_SWD_TAPID
-} else {
-       set _M4_SWD_TAPID 0x2ba01477
-}
-
-if { [using_jtag] } {
-       set _M4_TAPID $_M4_JTAG_TAPID
-} {
-       set _M4_TAPID $_M4_SWD_TAPID
-}
-
-#
-# M0 TAP
-#
-if { [info exists M0_JTAG_TAPID] } {
-       set _M0_JTAG_TAPID $M0_JTAG_TAPID
-} else {
-       set _M0_JTAG_TAPID 0x0ba01477
-}
-
-swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
-                               -expected-id $_M4_TAPID
-target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
-
-if { [using_jtag] } {
-       swj_newdap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
-                               -expected-id $_M0_JTAG_TAPID
-       target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
-}
-
-if {![using_hla]} {
-   # on this CPU we should use VECTRESET to perform a soft reset and
-   # manually reset the periphery
-   # SRST or SYSRESETREQ disable the debug interface for the time of
-   # the reset and will not fit our requirements for a consistent debug
-   # session
-   cortex_m reset_config vectreset
-}
diff --git a/tcl/target/lpc43xx.cfg b/tcl/target/lpc43xx.cfg
new file mode 100644
index 0000000..c32e4de
--- /dev/null
+++ b/tcl/target/lpc43xx.cfg
@@ -0,0 +1,63 @@
+# NXP LPC43xx Dual Core Cortex-M4 + Cortex-M0
+
+source [find target/swj-dp.tcl]
+
+adapter_khz 500
+
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $CHIPNAME
+} else {
+       set _CHIPNAME lpc43xx
+}
+
+#
+# M4 JTAG mode TAP
+#
+if { [info exists M4_JTAG_TAPID] } {
+       set _M4_JTAG_TAPID $M4_JTAG_TAPID
+} else {
+       set _M4_JTAG_TAPID 0x4ba00477
+}
+
+#
+# M4 SWD mode TAP
+#
+if { [info exists M4_SWD_TAPID] } {
+       set _M4_SWD_TAPID $M4_SWD_TAPID
+} else {
+       set _M4_SWD_TAPID 0x2ba01477
+}
+
+if { [using_jtag] } {
+       set _M4_TAPID $_M4_JTAG_TAPID
+} {
+       set _M4_TAPID $_M4_SWD_TAPID
+}
+
+#
+# M0 TAP - only available using JTAG
+#
+if { [info exists M0_JTAG_TAPID] } {
+       set _M0_JTAG_TAPID $M0_JTAG_TAPID
+} else {
+       set _M0_JTAG_TAPID 0x0ba01477
+}
+
+swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
+                               -expected-id $_M4_TAPID
+target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
+
+if { [using_jtag] } {
+       swj_newdap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
+                               -expected-id $_M0_JTAG_TAPID
+       target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
+}
+
+if {![using_hla]} {
+   # on this CPU we should use VECTRESET to perform a soft reset and
+   # manually reset the periphery
+   # SRST or SYSRESETREQ disable the debug interface for the time of
+   # the reset and will not fit our requirements for a consistent debug
+   # session
+   cortex_m reset_config vectreset
+}

-- 

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