This is an automated email from Gerrit.

Alamy Liu ([email protected]) just uploaded a new patch set to Gerrit, which 
you can find at http://openocd.zylin.com/3347

-- gerrit

commit 4915db5c454be4a37c384977b46224aba6353c7e
Author: Alamy Liu <[email protected]>
Date:   Tue Feb 16 17:47:26 2016 -0800

    The TAG of a progress of ARMv8 on Juno R1
    
    Note:
    These patches are meant for reference. Althoug it might work, but unlikely.
    
    No time to re-organize all the lot patches, No time to verify the new
    re-based code and fixing all the stuff. Just checked in, in case of ...
    
    I believe there are some good stuff/idea in it. i.e.:
      The use of uintmax_t to solve n-bit problem forever
      co-exist of target_type & target_type_64 (v8 could switch mode on 
exception)
      armv8_cti.* is fully tested except armv8_cti_enable_cross_halt_restart()
      simplify the single/smp handling in aarch64.c
        aarch64_halt_one / aarch64_halt_smp
        aarch64_poll_one / aarch64_poll_smp
        ...
    That might have benefit to other developers. Just my little hope~ ^_^
    
    ------------------------------
    Status
    * Use different configuration files for Single core/SMP debugging
      > armv8_juno_r1.a57x1.cfg (for Single core --- i.e.: UEFI)
      > armv8_juno_r1.a57x2.cfg (for SMP --- i.e.: Linux kernel)
      Fix: Should be able to combined into one configuration file,
           enable/disable from GDB client
    
    * Registers --- good
      > GDB "J/j" protocol not implemented ("info reg" always shows one
        core's register, in SMP)
      > Alternative: use "monitor targets [a57.cpu0|a57.cpu1|...]" to switch
        target. use "monitor reg" to examine register values.
      > In SMP, "set $<reg> = <value>" always set the same target (because
        "J/j" protocol not implemented _yet_)
      Fix: Implement the "J/j" command protocol.
    
    * Memory --- good
      > Only through debugging interface, no AHB, no MMU on/off handling, 
...etc.
      Fix: review/fix all the other memory related functions.
    
    * Halt --- works
    * Resume --- works
    * Breakpoint --- works
    * ECT/CTI (single / smp) --- works
      > Embedded Cross Trigger / Cross Trigger Interface
    
    * Source code level debugging
      > UEFI --- code is relocated, there is problem to re-define symbol 
address.
      > Kernel --- good.
    
    * Step --- Not verified
      > If Debug State was entered due to breakpoint, delete breakpoint before
        "continue".
      Reason: When "continue" on a breakpoint, GDB issues a "step" command to
        step over that instruction before "continue"
    
    * Watchpoint --- NOT implemented (same status as v7:cortex_a)
    
    (That was the work based on
      2dcf7bf77d09f139 svf: flush the queue before reallocing memory)
    ------------------------------
    
    These patches are rebased on Feb-15,2016 source
      50d4f76e13 Add board config for ST NUCLEO L476RG board
    
    * Resolve merging conflict
      > Some fixes are already in arm_adi_v5.* and adi_v5_jtag.c during the 
time.
        But the definitions are a little bit different
      > The moving of dap_ap_select() into mem_ap_sel_xxx(). Need to reivew
        aarch64.c, armv8_cti.c, and/or arm_adi_v5.c
    
    Change-Id: Ia44909855870926836dce247de6ec215b65e6023
    Signed-off-by: Alamy Liu <[email protected]>

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