This is an automated email from Gerrit. Paul Fertser ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4125
-- gerrit commit c4822763398e179352fceafab54ced8f08f7cec0 Author: Paul Fertser <[email protected]> Date: Mon May 8 11:09:52 2017 +0300 jtag: drivers: bcm2835gpio: fix clear/set sequence In both JTAG and SWD modes the target samples adapter's signals on the rising clock edge. I am still not sure if it is valid to set both signals and clock at the same time but this patch should at least make it less risky. Not runtime-tested. Change-Id: I4a04617c10b1c78a08126fa374d774d2ca1e63ac Signed-off-by: Paul Fertser <[email protected]> diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c index a41caf0..3208db7 100644 --- a/src/jtag/drivers/bcm2835gpio.c +++ b/src/jtag/drivers/bcm2835gpio.c @@ -101,8 +101,8 @@ static void bcm2835gpio_write(int tck, int tms, int tdi) uint32_t set = tck<<tck_gpio | tms<<tms_gpio | tdi<<tdi_gpio; uint32_t clear = !tck<<tck_gpio | !tms<<tms_gpio | !tdi<<tdi_gpio; - GPIO_SET = set; GPIO_CLR = clear; + GPIO_SET = set; for (unsigned int i = 0; i < jtag_delay; i++) asm volatile (""); @@ -113,8 +113,8 @@ static void bcm2835gpio_swd_write(int tck, int tms, int tdi) uint32_t set = tck<<swclk_gpio | tdi<<swdio_gpio; uint32_t clear = !tck<<swclk_gpio | !tdi<<swdio_gpio; - GPIO_SET = set; GPIO_CLR = clear; + GPIO_SET = set; for (unsigned int i = 0; i < jtag_delay; i++) asm volatile (""); -- ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
