This is an automated email from Gerrit. Salvador Arroyo ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4126
-- gerrit commit 0c4f7cc05040e3dea45c55fca593ee3767d2d375 Author: Salvador Arroyo <[email protected]> Date: Mon May 8 18:59:04 2017 +0200 mips32: change in wait_for_pracc_rw Added read address option. With this option set, control scan is queued and execution is requested when reading the address scan. READ_ADDR defined for clarification only. mips32_pracc_read_ctrl_addr() no more needed. Change-Id: Ia4a8d84d4633125899473c3c194ab1687714c5b5 Signed-off-by: Salvador Arroyo <[email protected]> diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index 790c8dc..456414f 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -73,20 +73,28 @@ #include "mips32.h" #include "mips32_pracc.h" -static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info) +static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, bool read_addr) { int64_t then = timeval_ms(); - /* wait for the PrAcc to become "1" */ - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); - while (1) { + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); ejtag_info->pa_ctrl = ejtag_info->ejtag_ctrl; - int retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_info->pa_ctrl); + uint8_t ctrl_scan[4]; + mips_ejtag_drscan_32_queued(ejtag_info, ejtag_info->pa_ctrl, ctrl_scan); /* queued */ + + int retval; + if (read_addr) { + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); + ejtag_info->pa_addr = 0; + retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_info->pa_addr); /* request execution */ + } else + retval = jtag_execute_queue(); /* request execution */ if (retval != ERROR_OK) return retval; - if (ejtag_info->pa_ctrl & EJTAG_CTRL_PRACC) + ejtag_info->pa_ctrl = buf_get_u32(ctrl_scan, 0, 32); + if (ejtag_info->pa_ctrl & EJTAG_CTRL_PRACC) /* if pracc bit set, done */ break; int64_t timeout = timeval_ms() - then; @@ -95,23 +103,9 @@ static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info) return ERROR_JTAG_DEVICE_ERROR; } } - return ERROR_OK; } -/* Shift in control and address for a new processor access, save them in ejtag_info */ -static int mips32_pracc_read_ctrl_addr(struct mips_ejtag *ejtag_info) -{ - int retval = wait_for_pracc_rw(ejtag_info); - if (retval != ERROR_OK) - return retval; - - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); - - ejtag_info->pa_addr = 0; - return mips_ejtag_drscan_32(ejtag_info, &ejtag_info->pa_addr); -} - /* Finish processor access */ static void mips32_pracc_finish(struct mips_ejtag *ejtag_info) { @@ -127,7 +121,7 @@ int mips32_pracc_clean_text_jump(struct mips_ejtag *ejtag_info) /* do 3 0/nops to clean pipeline before a jump to pracc text, NOP in delay slot */ for (int i = 0; i != 5; i++) { /* Wait for pracc */ - int retval = wait_for_pracc_rw(ejtag_info); + int retval = wait_for_pracc_rw(ejtag_info, 0); if (retval != ERROR_OK) return retval; @@ -144,7 +138,7 @@ int mips32_pracc_clean_text_jump(struct mips_ejtag *ejtag_info) return ERROR_OK; for (int i = 0; i != 2; i++) { - int retval = mips32_pracc_read_ctrl_addr(ejtag_info); + int retval = wait_for_pracc_rw(ejtag_info, READ_ADDR); if (retval != ERROR_OK) return retval; @@ -186,7 +180,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct LOG_DEBUG("restarting code"); } - retval = mips32_pracc_read_ctrl_addr(ejtag_info); /* update current pa info: control and address */ + retval = wait_for_pracc_rw(ejtag_info, READ_ADDR); /* update current pa info: control and address */ if (retval != ERROR_OK) return retval; @@ -975,7 +969,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are /* execute jump code, with no address check */ for (unsigned i = 0; i < ARRAY_SIZE(jmp_code); i++) { - int retval = wait_for_pracc_rw(ejtag_info); + int retval = wait_for_pracc_rw(ejtag_info, 0); if (retval != ERROR_OK) return retval; @@ -987,7 +981,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are } /* wait PrAcc pending bit for FASTDATA write, read address */ - int retval = mips32_pracc_read_ctrl_addr(ejtag_info); + int retval = wait_for_pracc_rw(ejtag_info, READ_ADDR); if (retval != ERROR_OK) return retval; @@ -1000,7 +994,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA); mips_ejtag_fastdata_scan(ejtag_info, 1, &val); - retval = wait_for_pracc_rw(ejtag_info); + retval = wait_for_pracc_rw(ejtag_info, 0); if (retval != ERROR_OK) return retval; @@ -1024,7 +1018,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are return retval; } - retval = mips32_pracc_read_ctrl_addr(ejtag_info); + retval = wait_for_pracc_rw(ejtag_info, READ_ADDR); if (retval != ERROR_OK) return retval; diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h index fe9f814..e4b492f 100644 --- a/src/target/mips32_pracc.h +++ b/src/target/mips32_pracc.h @@ -44,6 +44,7 @@ /*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/ #define PRACC_BLOCK 128 /* 1 Kbyte */ +#define READ_ADDR 1 typedef struct { uint32_t instr; diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h index 71f5c1b..d637dd4 100644 --- a/src/target/mips_ejtag.h +++ b/src/target/mips_ejtag.h @@ -224,6 +224,7 @@ void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf); void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data); int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data); +void mips_ejtag_drscan_32_queued(struct mips_ejtag *ejtag_info, uint32_t data_out, uint8_t *data_in); void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data); int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint8_t *data); int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data); -- ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
