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Daniel Glöckner ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/4246

-- gerrit

commit 5c201e7634066386a9d970db380f10da2ce597fa
Author: Daniel Glöckner <[email protected]>
Date:   Sun Oct 8 11:31:08 2017 +0200

    mips_ejtag: Check if the ROCC bit can be set
    
    Chips like the Ingenic JZ4730 (EJTAG v2.5) have a ROCC bit where writing
    a 1 causes the bit to be set. This is contrary to the EJTAG v2.6
    specification where is it said that a 1 is ignored by the hardware.
    
    If we can set ROCC, we should not set it in ejtag_ctrl. We might miss
    some resets, but mips_m4k_poll doesn't do much with that information
    right now anyway.
    
    Change-Id: Icbaac3555750757f09a4d55184df24f250b9723c
    Signed-off-by: Daniel Glöckner <[email protected]>

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 03a0952..f4c40e4 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -376,8 +376,27 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 
        ejtag_info->ejtag_ctrl = EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN;
 
-       if (ejtag_info->ejtag_version != EJTAG_VERSION_20)
-               ejtag_info->ejtag_ctrl |= EJTAG_CTRL_ROCC | EJTAG_CTRL_SETDEV;
+       if (ejtag_info->ejtag_version != EJTAG_VERSION_20) {
+               ejtag_info->ejtag_ctrl |= EJTAG_CTRL_SETDEV;
+
+               /*
+                * Test if we can set ROCC.
+                * Assumes that there is no reset while we do this.
+                */
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
+               mips_ejtag_drscan_32_out(ejtag_info, ejtag_info->ejtag_ctrl);
+               uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_ROCC;
+               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+               uint32_t ejtag_ctrl2 = ejtag_info->ejtag_ctrl;
+               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl2);
+
+               if (ejtag_ctrl & EJTAG_CTRL_ROCC)
+                       LOG_DEBUG("EJTAG: Failed to clear ROCC");
+               else if (ejtag_ctrl2 & EJTAG_CTRL_ROCC)
+                       LOG_DEBUG("EJTAG: ROCC appears to be R/W instead of 
R/W0");
+               else
+                       ejtag_info->ejtag_ctrl |= EJTAG_CTRL_ROCC;
+       }
 
        ejtag_info->fast_access_save = -1;
 

-- 

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