Hi,
I am working on getting the armv8 memory read/write able to read 8/16/32
bit addresses.
While doing this, I looked at cortex_a.c for guidance, and don't understand
how cortex_a_read_cpu_memory_slow() reads anything besides the first
8/16/32 bit at address.
cortex_a_read_cpu_memory() sets up r0 with the address to read from, does
some book
keeping, and then calls cortex_a_read_cpu_memory_{slow|fast} depending on
the alignment
of the address and the size of the access.
I understand cortex_a_read_cpu_memory_fast(), as that uses the cortex a's
memory mode
which handles incrementing r0 automatically.
However, cortex_a_read_cpu_memory_slow() issues a number of LDR{BHW}'s to
read data,
but never actually updates r0 to read from a new address.
What am I missing here?
Bas
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