This is an automated email from Gerrit. Tomas Vanek ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4725
-- gerrit commit bc87e3a0a774cf7bd4100c4e2da27a34b444216a Author: Tomas Vanek <[email protected]> Date: Wed Oct 17 13:08:36 2018 +0200 tcl/target: psoc4 and psoc6 converted to the new reset platform Change-Id: Icd401f52e919cbc189dfdc7e25ec7aba0af2769c Signed-off-by: Tomas Vanek <[email protected]> diff --git a/tcl/target/psoc4.cfg b/tcl/target/psoc4.cfg index eb51847..7f63575 100644 --- a/tcl/target/psoc4.cfg +++ b/tcl/target/psoc4.cfg @@ -93,124 +93,128 @@ proc psoc4_get_family_id {} { return $family_id } -proc ocd_process_reset_inner { MODE } { - global PSOC4_USE_ACQUIRE PSOC4_TEST_MODE_WORKAROUND - global _TARGETNAME - - if { 0 != [string compare $_TARGETNAME [target names]] } { - return -code error "PSoC 4 reset can handle only one $_TARGETNAME target"; - } - set t $_TARGETNAME - # If this target must be halted... - set halt -1 - if { 0 == [string compare $MODE halt] } { - set halt 1 - } - if { 0 == [string compare $MODE init] } { - set halt 1; - } - if { 0 == [string compare $MODE run ] } { - set halt 0; - } - if { $halt < 0 } { - return -code error "Invalid mode: $MODE, must be one of: halt, init, or run"; +proc psoc4_reset_plan_no_srst { phase target } { + global arp_reset_mode + global PSOC4_TEST_MODE_WORKAROUND + set halt [expr { $arp_reset_mode eq "halt" || $arp_reset_mode eq "init" }] + set TEST_MODE 0x40030014 + switch $phase { + pre { + arp_examine_one $target + if { $PSOC4_TEST_MODE_WORKAROUND } { + if { $halt } { + catch { mww $TEST_MODE 0x80000000 } + } else { + catch { mww $TEST_MODE 0 } + } + } + $target arp_reset prepare run + } + middle { + $target arp_reset trigger run + } + post { + $target arp_reset post_deassert $arp_reset_mode + if { $PSOC4_TEST_MODE_WORKAROUND } { + catch { mww $TEST_MODE 0 } + } + } } +} - if { ! [info exists PSOC4_USE_ACQUIRE] } { - if { 0 == [string compare [adapter_name] kitprog ] } { - set PSOC4_USE_ACQUIRE 1 - } else { - set PSOC4_USE_ACQUIRE 0 +proc psoc4_reset_plan_srst_acquire { phase target } { + global arp_reset_mode + switch $phase { + middle { + catch { [adapter_name] acquire_psoc } } - } - if { $PSOC4_USE_ACQUIRE } { - set PSOC4_TEST_MODE_WORKAROUND 0 - } elseif { ! [info exists PSOC4_TEST_MODE_WORKAROUND] } { - if { [psoc4_get_family_id] == 0x93 } { - set PSOC4_TEST_MODE_WORKAROUND 1 - } else { - set PSOC4_TEST_MODE_WORKAROUND 0 + post { + arp_examine_one $target } } +} - #$t invoke-event reset-start - $t invoke-event reset-assert-pre - - if { $halt && $PSOC4_USE_ACQUIRE } { - catch { [adapter_name] acquire_psoc } - $t arp_examine - } else { - if { $PSOC4_TEST_MODE_WORKAROUND } { - set TEST_MODE 0x40030014 - if { $halt == 1 } { - catch { mww $TEST_MODE 0x80000000 } +proc psoc4_reset_handler { phase target { secondary_core 0 } } { + global arp_reset_mode + global PSOC4_USE_ACQUIRE PSOC4_TEST_MODE_WORKAROUND + if [arp_is_tap_enabled $target] { + if { $phase eq "pre" } { + if { ! [info exists PSOC4_USE_ACQUIRE] } { + if { [adapter_name] eq "kitprog" } { + set PSOC4_USE_ACQUIRE 1 + } else { + set PSOC4_USE_ACQUIRE 0 + } + } + if { ! [info exists PSOC4_TEST_MODE_WORKAROUND] } { + set family_id [psoc4_get_family_id] + if { $family_id == 0x93 } { + set PSOC4_TEST_MODE_WORKAROUND 1 + } elseif { $family_id > 0x93 } { + set PSOC4_TEST_MODE_WORKAROUND 0 + } + } + } + if [reset_config_includes srst] { + if [reset_config_includes srst_nogate] { + echo "Wrong reset configuration! $target requires 'reset_config srst_gates_jtag'" } else { - catch { mww $TEST_MODE 0 } + set halt [expr { $arp_reset_mode eq "halt" || $arp_reset_mode eq "init" }] + if { $PSOC4_USE_ACQUIRE && $halt } { + psoc4_reset_plan_srst_acquire $phase $target + } else { + arp_reset_plan_srst_dbg_cleared $phase $target + } } + } else { + psoc4_reset_plan_no_srst $phase $target } - - $t arp_reset assert 0 } +} - $t invoke-event reset-assert-post - $t invoke-event reset-deassert-pre - if {![using_hla]} { # workaround ST-Link v2 fails and forcing reconnect - $t arp_reset deassert 0 - } - $t invoke-event reset-deassert-post - - # Pass 1 - Now wait for any halt (requested as part of reset - # assert/deassert) to happen. Ideally it takes effect without - # first executing any instructions. - if { $halt } { - # Now PSoC CPU should loop in system ROM - $t arp_waitstate running 200 - $t arp_halt +proc psoc4_reset_halter_sys_rom { target } { + global PSOC4_USE_ACQUIRE - # Catch, but ignore any errors. - catch { $t arp_waitstate halted 1000 } + # Now PSoC CPU should loop in system ROM + $target arp_waitstate running 200 + $target arp_halt - # Did we succeed? - set s [$t curstate] + # Catch, but ignore any errors. + catch { $target arp_waitstate halted 1000 } - if { 0 != [string compare $s "halted" ] } { - return -code error [format "TARGET: %s - Not halted" $t] - } + # Did we succeed? + set s [$target curstate] + if { $s ne "halted" } { + return -code error "$target not halted" + } - # Check if PSoC CPU is stopped in system ROM - set pc [ocd_reg pc] - regsub {pc[^:]*: } $pc "" pc - if { $pc < 0x10000000 || $pc > 0x1000ffff } { - set hint "" - set family_id [psoc4_get_family_id] - if { $family_id == 0x93 } { - set hint ", use 'reset_config none'" - } elseif { $family_id > 0x93 } { + # Check if PSoC CPU is stopped in system ROM + set pc [ocd_reg pc] + regsub {pc[^:]*: } $pc "" pc + if { $pc < 0x10000000 || $pc > 0x1000ffff } { + set hint "" + set family_id [psoc4_get_family_id] + if { $family_id == 0x93 } { + set hint ", use 'reset_config none'" + } elseif { $family_id > 0x93 } { + if { $PSOC4_USE_ACQUIRE } { + if { ![reset_config_includes srst]} { + set hint ", use 'reset_config srst_only'" + } + } else { set hint ", use a KitProg adapter" } - return -code error [format "TARGET: %s - Not halted in system ROM%s" $t $hint] - } - - # Set registers to reset vector values - mem2array value 32 0 2 - reg pc [expr $value(1) & 0xfffffffe ] - reg msp $value(0) - - if { $PSOC4_TEST_MODE_WORKAROUND } { - catch { mww $TEST_MODE 0 } } + return -code error "$target not halted in system ROM$hint" } - #Pass 2 - if needed "init" - if { 0 == [string compare init $MODE] } { - set err [catch "$t arp_waitstate halted 5000"] + # Set registers to reset vector values + mem2array value 32 0 2 + reg pc [expr $value(1) & 0xfffffffe ] + reg msp $value(0) +} - # Did it halt? - if { $err == 0 } { - $t invoke-event reset-init - } - } +set_arp_reset_handler $_TARGETNAME psoc4_reset_handler +$_TARGETNAME configure -event reset-halt "psoc4_reset_halter_sys_rom $_TARGETNAME" - $t invoke-event reset-end -} diff --git a/tcl/target/psoc6.cfg b/tcl/target/psoc6.cfg index fc0c711..f480c93 100644 --- a/tcl/target/psoc6.cfg +++ b/tcl/target/psoc6.cfg @@ -65,48 +65,12 @@ if { [info exists WORKAREAADDR_CM4] } { set _WORKAREAADDR_CM4 0x08000000 } -proc init_reset { mode } { - global RESET_MODE - set RESET_MODE $mode - - if {[using_jtag]} { - jtag arp_init-reset - } -} - -# Utility to make 'reset halt' work as reset;halt on a target -# It does not prevent running code after reset -proc psoc6_deassert_post { target } { - # PSoC6 cleared AP registers including TAR during reset - # Force examine to synchronize OpenOCD target status - $target arp_examine - - global RESET_MODE - global TARGET - - if { $RESET_MODE ne "run" } { - $target arp_poll - $target arp_poll - set st [$target curstate] - - if { $st eq "reset" } { - # we assume running state follows - # if reset accidentally halts, waiting is useless - catch { $target arp_waitstate running 100 } - set st [$target curstate] - } - - if { $st eq "running" } { - echo "$target: Ran after reset and before halt..." - if { $target eq "${TARGET}.cm0" } { - # Try to cleanly reset whole system - # and halt the CM0 at entry point - psoc6 reset_halt - $target arp_waitstate halted 100 - } else { - $target arp_halt - } - } +# CM0 core can be halted by vector catch if reset is sw triggered +proc psoc6_reset_halter { target } { + if [reset_config_includes srst] { + arp_reset_simple_halter $target + } else { + arp_reset_halt_default_handler $target } } @@ -122,7 +86,8 @@ if { $_ENABLE_CM0 } { flash bank super_flash_toc2_cm0 psoc6 0x16007C00 0 0 0 ${TARGET}.cm0 ${TARGET}.cm0 cortex_m reset_config sysresetreq - ${TARGET}.cm0 configure -event reset-deassert-post "psoc6_deassert_post ${TARGET}.cm0" + set_arp_reset_handler ${TARGET}.cm0 arp_reset_handler_dbg_cleared 0 + ${TARGET}.cm0 configure -event reset-halt "psoc6_reset_halter ${TARGET}.cm0" } if { $_ENABLE_CM4 } { @@ -136,8 +101,11 @@ if { $_ENABLE_CM4 } { flash bank super_flash_key_cm4 psoc6 0x16005A00 0 0 0 ${TARGET}.cm4 flash bank super_flash_toc2_cm4 psoc6 0x16007C00 0 0 0 ${TARGET}.cm4 - ${TARGET}.cm4 cortex_m reset_config vectreset - ${TARGET}.cm4 configure -event reset-deassert-post "psoc6_deassert_post ${TARGET}.cm4" +# ${TARGET}.cm4 cortex_m reset_config vectreset + + # Configure CM4 core as secondary if CM0 is enabled + set_arp_reset_handler ${TARGET}.cm4 arp_reset_handler_dbg_cleared $_ENABLE_CM0 + ${TARGET}.cm4 configure -event reset-halt "arp_reset_simple_halter ${TARGET}.cm4" } if { $_ENABLE_CM0 } { -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
